EP1S20F672C6N vs EP1S20F672I7 Comparison
Detailed side-by-side comparison of EP1S20F672C6N by Intel and EP1S20F672I7 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP1S20F672I7 - Stratix FPGA, 18,460 LEs, 672-BGA | Intel / Altera
EP1S20F672I7 β Last Time BuySpecification Comparison
| Parameter | EP1S20F672C6N | EP1S20F672I7 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $68.90 | $199.50 |
| Family | Stratix | Stratix (first generation) |
| Logic Elements | 18,460 | β |
| Total RAM Bits | 1,669,248 | β |
| User I/O Count | 426 | β |
| Package | 672-BBGA (FineLine BGA) 35 x 35 mm | 672-BBGA (FineLine BGA), 35 x 35 mm, 1.27 mm pitch |
| Package Pitch | 1.27 mm | β |
| Core Voltage | 1.5 V | β |
| Logic Family | CMOS | CMOS |
| Operating Temperature | 0 C to 85 C (commercial) | -40C to +85C (industrial grade, I7 suffix) |
| Speed Grade | -6 | β |
| Configuration Mode | PS, FPP, JTAG | β |
| Embedded DSP Blocks | Yes (36 x 36-bit multipliers) | β |
| TriMatrix Memory | M512, M4K, M-RAM blocks | β |
| PLLs | 12 (4 enhanced) | β |
| Global Clock Networks | 16 | β |
| Mounting Type | Surface Mount | Surface Mount (BGA) |
| Lead Free | Yes | β |
| RoHS Status | Compliant | unknown |
| Logic Elements (LEs) | β | 18,460 |
| Maximum RAM Bits | β | 1,669,248 |
| DSP Blocks | β | [DATA_NEEDED: exact DSP block count] |
| Maximum User I/Os | β | 426 |
| Supply Voltage (VCCINT core) | β | 1.5 V |
| Configuration Modes | β | Passive Serial, Passive Parallel, JTAG |
| Number of Pins / Balls | β | 672 |
| Clock Management PLLs | β | [DATA_NEEDED: PLL count] |
| Lead-Free / Finish | β | SnPb (e0 per Partstack datasheet extract) |
| MSL Level | β | unknown |
| Status | β | Last Time Buy (per distributor notices) |