EP1S20F672C7N vs EP1S20F672I7 Comparison

Detailed side-by-side comparison of EP1S20F672C7N by Intel and EP1S20F672I7 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP1S20F672C7N EP1S20F672I7
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Last Time Buy
Stock Status In Stock In Stock
Unit Price (USD) $109.20 $199.50
Series Stratix (first generation) —
Family Stratix Stratix (first generation)
Logic Elements (LEs) 18,460 18,460
Logic Cells 18,460 —
Configurable Logic Blocks (CLBs) 2,132 —
Embedded Memory (TriMatrix) 1,669,248 bits (426 Kbit total) —
DSP Blocks 56 (dedicated 18x18 multipliers) [DATA_NEEDED: exact DSP block count]
Maximum User I/O 586 —
I/O Banks [DATA_NEEDED: I/O bank count] —
PLLs Up to 12 —
Maximum Operating Frequency 420.17 MHz —
Core Voltage 1.5 V —
Process Technology 130 nm CMOS —
Package 672-FBGA (FineLine BGA) 672-BBGA (FineLine BGA), 35 x 35 mm, 1.27 mm pitch
Package Body Size 35 mm x 35 mm —
Ball Pitch 1.27 mm —
Operating Temperature 0°C to +85°C (commercial) -40C to +85C (industrial grade, I7 suffix)
Speed Grade C7 (-7) —
Mounting Type Surface Mount Surface Mount (BGA)
Lead-Free / RoHS Yes (lead-free finish, RoHS compliant) —
Configuration Modes PS, PPS, FPP, JTAG Passive Serial, Passive Parallel, JTAG
MSL Level [DATA_NEEDED: moisture sensitivity level] unknown
Maximum RAM Bits — 1,669,248
Maximum User I/Os — 426
Supply Voltage (VCCINT core) — 1.5 V
Logic Family — CMOS
Number of Pins / Balls — 672
Clock Management PLLs — [DATA_NEEDED: PLL count]
RoHS Status — unknown
Lead-Free / Finish — SnPb (e0 per Partstack datasheet extract)
Status — Last Time Buy (per distributor notices)

Datasheets & Resources

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