EP1S30B956C6 vs EP1S40B956C6 Comparison
Detailed side-by-side comparison of EP1S30B956C6 by Altera and EP1S40B956C6 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP1S30B956C6 | EP1S40B956C6 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $78.00 | $1,078.40 |
| Family | Stratix | Stratix |
| Logic Elements (LEs) | 32,470 | β |
| Logic Array Blocks (LABs) | 3,247 | 4,125 |
| Embedded Memory Bits | 3,317,184 (approximately 3.4 Mbit) | β |
| Maximum User I/O | 683 | β |
| Process Technology | 130 nm CMOS | 0.13 um CMOS |
| Core Voltage (VCCINT) | 1.5 V | β |
| Operating Temperature | 0 C to 85 C (Commercial) | 0C to 85C |
| Speed Grade | C6 | 6 (commercial, slowest) |
| Package | 956-ball FCBGA (BGA-956), 40 x 40 mm, 1.27 mm pitch | BGA-956 (956-BBGA, FCBGA) |
| Mounting Type | Surface Mount | Surface Mount |
| Maximum Internal Frequency | 450.05 MHz (per family datasheet) | β |
| DSP Blocks | Yes (Stratix DSP blocks) | Embedded multiplier blocks |
| PLLs | Up to 12 | Multiple phase-locked loops |
| Configuration Modes | Passive Serial (PS), Passive Parallel (PP), JTAG | β |
| RoHS Status | Not confirmed - pre-RoHS part | β |
| MSL Level | [DATA_NEEDED: MSL level] | β |
| Lead-Free | Unknown | β |
| Logic Elements / Cells | β | 41,250 |
| CLB Equivalents / Registers | β | 46,970 |
| User I/O Pins | β | 683 |
| Package Size | β | 40 x 40 mm |
| Ball Pitch | β | 1.27 mm |
| Core Supply Voltage | β | 1.5 V |
| Logic Family | β | CMOS |
| Embedded Memory | β | TriMatrix (M512, M4K, M-RAM blocks) |
| Lead-Free / RoHS | β | Per Altera/Intel datasheet |