EP1S40F780C7N vs EP1S40F780I6N Comparison
Detailed side-by-side comparison of EP1S40F780C7N by Intel and EP1S40F780I6N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP1S40F780C7N | EP1S40F780I6N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $99.50 | $89.50 |
| Family | Stratix | β |
| Logic Elements | 41,250 | 41,250 |
| Embedded Memory (bits) | 3,423,744 | β |
| Maximum User I/O | 615 | β |
| Operating Supply Voltage (Core) | 1.5 V | β |
| Process Technology | 130 nm CMOS | β |
| Speed Grade | 7 | β |
| Operating Temperature | 0 C to +85 C (Commercial) | -40C to +100C (industrial) |
| Package | 780-BBGA, FC-FBGA, 29 x 29 mm, 1.0 mm pitch | 780-FBGA (29 x 29 mm, 1.0 mm pitch) |
| Mounting Type | Surface Mount (BGA) | Surface Mount |
| DSP Blocks | 14 | 12 |
| Maximum Performance | 420 MHz | β |
| PLLs | Up to 12 | [DATA_NEEDED: PLL count per Stratix handbook] |
| LVDS Data Rate (max) | 840 Mbps per channel | β |
| Configuration Modes | PS, PPA, PPS, JTAG | β |
| I/O Standards | LVDS, LVPECL, PCI-X, HSTL, SSTL, LVTTL, LVCMOS | β |
| TriMatrix Memory | Yes (three block sizes) | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | Compliant |
| Series | β | Stratix |
| Logic Array Blocks (LABs) | β | 4,125 |
| Total RAM Bits | β | 3,423,744 |
| User I/O Pins | β | 615 |
| Core Voltage (VCCINT) | β | 1.425 V to 1.575 V |
| Number of I/O Banks | β | [DATA_NEEDED: number of I/O banks] |
| Embedded Multipliers | β | Yes (per DSP block) |
| Configuration Method | β | SRAM-based, volatile |
| MSL Level | β | 3 |
| Lead Free | β | Yes |
| Process Node | β | 150 nm CMOS |