EP20K600CF672C8N vs EP20K600CF672C7N Comparison

Detailed side-by-side comparison of EP20K600CF672C8N by Intel and EP20K600CF672C7N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Intel
EP20K600CF672C8N EP20K600CF672C8N - 600K-Gate FPGA, 508 I/O | Intel | APEX 20K

EP20K600CF672C8N - 600K-Gate FPGA, 508 I/O | Intel | APEX 20K

EP20K600CF672C8N βœ“ Active
Altera
EP20K600CF672C7N EP20K600CF672C7N - APEX 20KC 600K-Gate FPGA | 488 I/O | 652-BGA

EP20K600CF672C7N - APEX 20KC 600K-Gate FPGA | 488 I/O | 652-BGA

EP20K600CF672C7N Obsolete

Specification Comparison

Parameter EP20K600CF672C8N EP20K600CF672C7N
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $108.00 $108.00
Device Type SPLD β€”
Product Type FPGA / programmable logic device β€”
Family APEX 20KC β€”
Nominal Gate Capacity 600K gates β€”
Logic Elements or Cells 24,320 β€”
Macros 2,432 β€”
User I/O Count 508 β€”
Package Terminals 652 pins β€”
Package BGA-652, 45 x 45 mm, 1.27 mm pitch FC-FBGA (BGA-652) 45 x 45 mm, 1.27 mm pitch
Package Description 672-pin FC-FBGA β€”
Supply Voltage 1.8 V β€”
Listed Frequency 301.21 MHz β€”
Propagation Delay 1.48 ns 1.48 ns
Fabrication Process 0.15 Β΅m β€”
Operating Temperature 0Β°C to 85Β°C 0 Β°C to +85 Β°C (Commercial)
Interconnect Metal All-layer copper metal β€”
I/O Configuration 508 user I/O β€”
Mounting Type Surface mount Surface Mount (BGA)
RoHS Status unknown unknown
REACH Status unknown β€”
AEC-Q100 Qualification unknown β€”
Configuration Method [DATA_NEEDED: configuration memory and programming method] β€”
Core Current [DATA_NEEDED: core supply current] β€”
I/O Bank Voltage [DATA_NEEDED: supported I/O voltage range] β€”
Junction Temperature [DATA_NEEDED: maximum junction temperature] β€”
Thermal Resistance [DATA_NEEDED: junction-to-ambient thermal resistance] β€”
Device Family β€” APEX 20KC
Maximum System Gates β€” 1,052,000
Typical Gates β€” 600,000
Logic Elements / Cells β€” 24,320
Maximum User I/O Pins β€” 488
Total Package Pins β€” 652
Core Voltage β€” 1.8 V
Maximum Operating Frequency β€” 375.94 MHz
Process Technology β€” 0.15 Β΅m all-layer copper-metal CMOS
Architecture β€” MultiCore (LUT + Embedded System Memory)
Speed Grade β€” C7
Seated Height β€” 3.50 mm

Datasheets & Resources

EP20K600CF672C8N

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EP20K600CF672C7N

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