EP20K600CF672C8N vs EP20K600CF672C7N 对比

详细并排对比 EP20K600CF672C8N 出自 Intel 和 EP20K600CF672C7N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K600CF672C8N EP20K600CF672C7N
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 Obsolete
库存状态 有库存 有库存
单价(USD) $108.00 $108.00
Device Type SPLD —
Product Type FPGA / programmable logic device —
Family APEX 20KC —
Nominal Gate Capacity 600K gates —
Logic Elements or Cells 24,320 —
Macros 2,432 —
User I/O Count 508 —
Package Terminals 652 pins —
封装 BGA-652, 45 x 45 mm, 1.27 mm pitch FC-FBGA (BGA-652) 45 x 45 mm, 1.27 mm pitch
Package Description 672-pin FC-FBGA —
电源电压 1.8 V —
Listed Frequency 301.21 MHz —
Propagation Delay 1.48 ns 1.48 ns
Fabrication Process 0.15 µm —
工作温度 0°C to 85°C 0 °C to +85 °C (Commercial)
Interconnect Metal All-layer copper metal —
I/O Configuration 508 user I/O —
安装类型 Surface mount Surface Mount (BGA)
RoHS 状态 unknown unknown
REACH Status unknown —
AEC-Q100 Qualification unknown —
Configuration Method [DATA_NEEDED: configuration memory and programming method] —
Core Current [DATA_NEEDED: core supply current] —
I/O Bank Voltage [DATA_NEEDED: supported I/O voltage range] —
Junction Temperature [DATA_NEEDED: maximum junction temperature] —
热阻 [DATA_NEEDED: junction-to-ambient thermal resistance] —
Device Family — APEX 20KC
Maximum System Gates — 1,052,000
Typical Gates — 600,000
Logic Elements / Cells — 24,320
Maximum User I/O Pins — 488
Total Package Pins — 652
Core Voltage — 1.8 V
Maximum Operating Frequency — 375.94 MHz
Process Technology — 0.15 µm all-layer copper-metal CMOS
Architecture — MultiCore (LUT + Embedded System Memory)
Speed Grade — C7
Seated Height — 3.50 mm

数据手册与资源

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