EP20K600CF672C8N vs EP20K600CF672C7N तुलना
विस्तृत दोनों ओर की तुलना EP20K600CF672C8N द्वारा Intel और EP20K600CF672C7N द्वारा Altera. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
विशेषता तुलना
| पैरामीटर | EP20K600CF672C8N | EP20K600CF672C7N |
|---|---|---|
| ब्रांड | Intel | Altera |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | सक्रिय | Obsolete |
| Device Type | SPLD | — |
| Product Type | FPGA / programmable logic device | — |
| Family | APEX 20KC | — |
| Nominal Gate Capacity | 600K gates | — |
| Logic Elements or Cells | 24,320 | — |
| Macros | 2,432 | — |
| User I/O Count | 508 | — |
| Package Terminals | 652 pins | — |
| पैकेज | BGA-652, 45 x 45 mm, 1.27 mm pitch | FC-FBGA (BGA-652) 45 x 45 mm, 1.27 mm pitch |
| Package Description | 672-pin FC-FBGA | — |
| सप्लाई वोल्टेज | 1.8 V | — |
| Listed Frequency | 301.21 MHz | — |
| Propagation Delay | 1.48 ns | 1.48 ns |
| Fabrication Process | 0.15 µm | — |
| ऑपरेटिंग तापमान | 0°C to 85°C | 0 °C to +85 °C (Commercial) |
| Interconnect Metal | All-layer copper metal | — |
| I/O Configuration | 508 user I/O | — |
| माउंटिंग प्रकार | Surface mount | Surface Mount (BGA) |
| RoHS स्थिति | unknown | unknown |
| REACH Status | unknown | — |
| AEC-Q100 Qualification | unknown | — |
| Configuration Method | [DATA_NEEDED: configuration memory and programming method] | — |
| Core Current | [DATA_NEEDED: core supply current] | — |
| I/O Bank Voltage | [DATA_NEEDED: supported I/O voltage range] | — |
| Junction Temperature | [DATA_NEEDED: maximum junction temperature] | — |
| थर्मल रेज़िस्टेंस | [DATA_NEEDED: junction-to-ambient thermal resistance] | — |
| Device Family | — | APEX 20KC |
| Maximum System Gates | — | 1,052,000 |
| Typical Gates | — | 600,000 |
| Logic Elements / Cells | — | 24,320 |
| Maximum User I/O Pins | — | 488 |
| Total Package Pins | — | 652 |
| Core Voltage | — | 1.8 V |
| Maximum Operating Frequency | — | 375.94 MHz |
| Process Technology | — | 0.15 µm all-layer copper-metal CMOS |
| Architecture | — | MultiCore (LUT + Embedded System Memory) |
| Speed Grade | — | C7 |
| Seated Height | — | 3.50 mm |