EP2A40F672C9 vs EP2A40F672C6 Comparison

Detailed side-by-side comparison of EP2A40F672C9 by Altera and EP2A40F672C6 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP2A40F672C9 EP2A40F672C6
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last_time_buy Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $62.00 $105.00
Family APEX II APEX II
Device Family APEX II PLD β€”
Logic Elements / Cells 38,400 β€”
System Gates 1.5 M β€”
Macros 2,560 β€”
User I/Os 492 β€”
Number of Pins 672 β€”
Package 672-BBGA, FC-FBGA (FineLine) 672-ball FineLine BGA (FBGA-672)
Package Size 27 mm Γ— 27 mm, 1 mm ball pitch β€”
Core Voltage 1.5 V β€”
Process Technology 0.15 Β΅m all-layer copper, up to 8 metal layers 0.18-micron CMOS
Logic Family CMOS β€”
Propagation Delay 1.55 ns β€”
Internal Speed Grade 366 MHz β€”
Operating Temperature 0 Β°C to 85 Β°C (commercial) Commercial (0C to +85C)
I/O Standards Supported True-LVDS, LVPECL, PCML, HyperTransport β€”
Mounting Type Surface Mount Surface Mount (BGA)
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Device β€” EP2A40
Logic Elements (typical) β€” 40,000
Maximum System Gates β€” [DATA_NEEDED: maximum system gates]
Embedded System Blocks (ESBs) β€” [DATA_NEEDED: ESB count]
Maximum User I/O Pins β€” [DATA_NEEDED: max user I/O count]
Speed Grade β€” C6 (commercial)
Configuration Memory β€” SRAM-based
JTAG Support β€” Yes (IEEE 1149.1)
PLL Support β€” Yes
Lead-Free β€” [DATA_NEEDED: lead-free status]
Lifecycle β€” Obsolete / EOL (per Intel/Altera product discontinuation notice)

Datasheets & Resources

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