EP2A40F672C9 vs EP2A40F672C6 Perbandingan
Perbandingan bersamaan detil EP2A40F672C9 dari Altera dan EP2A40F672C6 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Altera
EP2A40F672C9 - APEX II FPGA 1.5M Gates 38400 Cells 672-BGA | Altera
EP2A40F672C9 ⚠ Waktu Beli Terakhir
Perbandingan Spesifikasi
| Parameter Umum | EP2A40F672C9 | EP2A40F672C6 |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Waktu Pembelian Terakhir | Obsolete |
| Family | APEX II | APEX II |
| Device Family | APEX II PLD | — |
| Logic Elements / Cells | 38,400 | — |
| System Gates | 1.5 M | — |
| Macros | 2,560 | — |
| User I/Os | 492 | — |
| Jumlah Pin | 672 | — |
| Paket | 672-BBGA, FC-FBGA (FineLine) | 672-ball FineLine BGA (FBGA-672) |
| Package Size | 27 mm × 27 mm, 1 mm ball pitch | — |
| Core Voltage | 1.5 V | — |
| Process Technology | 0.15 µm all-layer copper, up to 8 metal layers | 0.18-micron CMOS |
| Logic Family | CMOS | — |
| Propagation Delay | 1.55 ns | — |
| Internal Speed Grade | 366 MHz | — |
| Suhu Kerja | 0 °C to 85 °C (commercial) | Commercial (0C to +85C) |
| I/O Standards Supported | True-LVDS, LVPECL, PCML, HyperTransport | — |
| Tipe Mounting | Surface Mount | Surface Mount (BGA) |
| Status RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Device | — | EP2A40 |
| Logic Elements (typical) | — | 40,000 |
| Maximum System Gates | — | [DATA_NEEDED: maximum system gates] |
| Embedded System Blocks (ESBs) | — | [DATA_NEEDED: ESB count] |
| Maximum User I/O Pins | — | [DATA_NEEDED: max user I/O count] |
| Speed Grade | — | C6 (commercial) |
| Configuration Memory | — | SRAM-based |
| JTAG Support | — | Yes (IEEE 1149.1) |
| PLL Support | — | Yes |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Lifecycle | — | Obsolete / EOL (per Intel/Altera product discontinuation notice) |