EP2AGX190FF35C4G vs EP2AGX190FF35I3G Comparison
Detailed side-by-side comparison of EP2AGX190FF35C4G by Altera and EP2AGX190FF35I3G by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP2AGX190FF35I3G - Arria II GX FPGA 190K LE | Intel | Altera
EP2AGX190FF35I3G β Last Time BuySpecification Comparison
| Parameter | EP2AGX190FF35C4G | EP2AGX190FF35I3G |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $2,350.00 | $1,840.00 |
| Family | Arria II GX | Arria II GX |
| Logic Elements | 181,165 | β |
| Equivalent Logic Elements | 190,000 | β |
| Adaptive Logic Modules (ALMs) | [DATA_NEEDED: ALM count] | β |
| Embedded Memory (bits) | 10,177,536 | 10,177,536 |
| Embedded Memory (M20K blocks) | [DATA_NEEDED: M20K block count] | β |
| Embedded 18x18 Multipliers | 612 | β |
| Transceiver Channels | 12 (up to 6.375 Gbps) | β |
| Maximum Transceiver Data Rate | 6.375 Gbps | β |
| Hard PCIe Gen2 Blocks | Yes (2) | β |
| User I/O Pins (maximum) | [DATA_NEEDED: user I/O count] | β |
| Package | 1152-BBGA, FCBGA (35 mm) | 1152-ball FC-FBGA (FF35), 35 mm body |
| Process Technology | 40 nm low-power CMOS | β |
| Operating Temperature Grade | Commercial (0C to +85C) | β |
| Speed Grade | C4 | 3 |
| Mounting Type | Surface Mount (BGA) | Surface Mount (flip-chip BGA) |
| MSL Level | 3 (per JEDEC J-STD-020) | β |
| RoHS Status | Compliant | Compliant (suffix G) |
| Lead-Free | Yes | Yes |
| Development Tool | Quartus II (legacy) | β |
| Logic Elements (LE) | β | 181,165 |
| Adaptive Logic Modules (ALM) | β | [DATA_NEEDED: ALM count] |
| User I/O Pins | β | 612 |
| Number of I/O Banks | β | [DATA_NEEDED: number of I/O banks] |
| Transceivers | β | 8 high-speed transceiver channels (multi-gigabit) |
| Embedded Multipliers | β | [DATA_NEEDED: 18x18 multiplier count] |
| PLLs | β | [DATA_NEEDED: PLL count] |
| Core Voltage | β | 0.9 V |
| I/O Voltage Standards | β | 1.2 V to 3.3 V (LVTTL, LVCMOS, LVDS, HSTL, SSTL) |
| Process Node | β | 40 nm |
| Operating Temperature | β | -40 Β°C to +100 Β°C (industrial, suffix I) |
| Ball Pitch | β | [DATA_NEEDED: 1.0 mm (typical for FF35)] |
| Programming Toolchain | β | Quartus II / Quartus Prime |