EP2AGX190FF35C4G vs EP2AGX190FF35I3G Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EP2AGX190FF35C4G disebabkan oleh Altera dan EP2AGX190FF35I3G disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Altera
EP2AGX190FF35I3G - Arria II GX FPGA 190K LE | Intel | Altera
EP2AGX190FF35I3G ⚠ Bahagian terakhir untuk beliPengandingan Spesifikasi
| Parametr | EP2AGX190FF35C4G | EP2AGX190FF35I3G |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Aktif | Masa Terakhir Dibeli |
| Family | Arria II GX | Arria II GX |
| Logic Elements | 181,165 | — |
| Equivalent Logic Elements | 190,000 | — |
| Adaptive Logic Modules (ALMs) | [DATA_NEEDED: ALM count] | — |
| Embedded Memory (bits) | 10,177,536 | 10,177,536 |
| Embedded Memory (M20K blocks) | [DATA_NEEDED: M20K block count] | — |
| Embedded 18x18 Multipliers | 612 | — |
| Transceiver Channels | 12 (up to 6.375 Gbps) | — |
| Maximum Transceiver Data Rate | 6.375 Gbps | — |
| Hard PCIe Gen2 Blocks | Yes (2) | — |
| User I/O Pins (maximum) | [DATA_NEEDED: user I/O count] | — |
| Kemasan | 1152-BBGA, FCBGA (35 mm) | 1152-ball FC-FBGA (FF35), 35 mm body |
| Process Technology | 40 nm low-power CMOS | — |
| Operating Temperature Grade | Commercial (0C to +85C) | — |
| Speed Grade | C4 | 3 |
| Jenis Pemasangan | Surface Mount (BGA) | Surface Mount (flip-chip BGA) |
| Aras MSL | 3 (per JEDEC J-STD-020) | — |
| Status RoHS | Compliant | Compliant (suffix G) |
| Lead-Free | Yes | Yes |
| Development Tool | Quartus II (legacy) | — |
| Logic Elements (LE) | — | 181,165 |
| Adaptive Logic Modules (ALM) | — | [DATA_NEEDED: ALM count] |
| User I/O Pins | — | 612 |
| Number of I/O Banks | — | [DATA_NEEDED: number of I/O banks] |
| Transceivers | — | 8 high-speed transceiver channels (multi-gigabit) |
| Embedded Multipliers | — | [DATA_NEEDED: 18x18 multiplier count] |
| PLLs | — | [DATA_NEEDED: PLL count] |
| Core Voltage | — | 0.9 V |
| I/O Voltage Standards | — | 1.2 V to 3.3 V (LVTTL, LVCMOS, LVDS, HSTL, SSTL) |
| Process Node | — | 40 nm |
| Suhu Operasi | — | -40 °C to +100 °C (industrial, suffix I) |
| Ball Pitch | — | [DATA_NEEDED: 1.0 mm (typical for FF35)] |
| Programming Toolchain | — | Quartus II / Quartus Prime |