EP610DC-10 vs EP610DC-20 Comparison

Detailed side-by-side comparison of EP610DC-10 by Intel and EP610DC-20 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP610DC-10 EP610DC-20
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $7.95 $15.85
Device Family Altera Classic EPLD β€”
Macrocells 16 β€”
Maximum Pipelined Data Rate 100 MHz β€”
Pin-to-Pin Propagation Delay (tpd) 10 ns β€”
Speed Grade -10 β€”
Package 24-pin CDIP (Ceramic DIP, windowed) 24-pin Ceramic DIP (CDIP-24) with UV window
Mounting Type Through-Hole Through-hole
Technology CMOS, EPROM-based (UV-erasable) β€”
Supply Voltage 5 V (single supply) β€”
Operating Temperature 0C to +70C (commercial) 0 Β°C to 70 Β°C (commercial)
I/O Pins [DATA_NEEDED: exact I/O count for CDIP-24 variant] 16 (bidirectional)
Logic Elements 16 macrocells (programmable AND/OR array) β€”
Configuration Memory UV-erasable EPROM β€”
Reprogrammable Yes (UV erase window on package) β€”
RoHS Status [DATA_NEEDED: not stated in verified web data] [DATA_NEEDED: RoHS compliance status]
Product Type β€” CMOS UV-Erasable Programmable Logic Device (EPLD)
Family β€” Classic EP610
Logic Macrocells β€” 16
Dedicated Inputs β€” 4
Total Usable Pins β€” 20
Product Terms (p-terms) β€” 160
Propagation Delay (tPD) β€” 22 ns
Maximum Toggle Frequency (fMAX) β€” 55.6 MHz
Supply Voltage (VCC) β€” 4.75 V to 5.25 V (5 V nominal)
Programming Method β€” UV erasure + parallel programmer
Process Technology β€” CMOS, UV-erasable floating gate
Lead-Free β€” [DATA_NEEDED: lead-free status]

Datasheets & Resources

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