EP610DC-20 vs EP610ILC-25 Comparison
Detailed side-by-side comparison of EP610DC-20 by Intel and EP610ILC-25 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP610DC-20 | EP610ILC-25 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $15.85 | $9.85 |
| Product Type | CMOS UV-Erasable Programmable Logic Device (EPLD) | β |
| Family | Classic EP610 | Classic EPLD (EP610 series) |
| Logic Macrocells | 16 | β |
| Dedicated Inputs | 4 | 4 |
| I/O Pins | 16 (bidirectional) | β |
| Total Usable Pins | 20 | β |
| Product Terms (p-terms) | 160 | β |
| Propagation Delay (tPD) | 22 ns | β |
| Maximum Toggle Frequency (fMAX) | 55.6 MHz | β |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | 4.75 V to 5.25 V |
| Operating Temperature | 0 Β°C to 70 Β°C (commercial) | β |
| Package | 24-pin Ceramic DIP (CDIP-24) with UV window | 28-pin PLCC (J-lead) |
| Programming Method | UV erasure + parallel programmer | In-system, electrically erasable |
| Process Technology | CMOS, UV-erasable floating gate | CMOS, electrically erasable |
| Mounting Type | Through-hole | Surface Mount |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | β |
| Device Type | β | EEPLD (Electrically Erasable PLD) |
| Usable Gates | β | 300 |
| Macrocells | β | 16 |
| Product Terms | β | 160 |
| Maximum Operating Frequency (fMAX) | β | 40 MHz |
| Pin-to-Pin Propagation Delay (tPD) | β | 25 ns |
| Nominal Supply Voltage | β | 5 V |
| Total Inputs | β | 20 |
| Bidirectional I/O Pins | β | 16 |
| Operating Temperature Range | β | 0 C to +70 C (commercial) |