EP610DC-35 vs EP610DI-35 Comparison
Detailed side-by-side comparison of EP610DC-35 by Altera and EP610DI-35 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP610DI-35 - 16-Macrocell Classic EPLD, 35ns, 5V, 24-CDIP | Intel / Altera
EP610DI-35 ObsoleteSpecification Comparison
| Parameter | EP610DC-35 | EP610DI-35 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | NRND | Obsolete |
| Device Type | CPLD - Classic EPLD | — |
| Family | Altera Classic EP610 | Altera Classic EPLD |
| Macrocells | 16 | — |
| Usable Gates | 300 | 300 |
| Propagation Delay (tPD) | 35 ns | — |
| Maximum Frequency (fMAX) | 28.6 MHz | — |
| Pipelined Data Rate | up to 100 MHz | — |
| Supply Voltage (VCC) | 5 V | — |
| Process Technology | CMOS | — |
| Program/erase Method | UV-erasable (windowed CERDIP) | — |
| Package | 24-pin CDIP (windowed CERDIP) 0.300 inch | 24-pin CDIP (Ceramic DIP) |
| Mounting Type | Through-Hole (DIP) | Through-hole |
| Operating Temperature | 0C to +70C (commercial) [DATA_NEEDED: explicit range from datasheet] | [DATA_NEEDED: industrial/commercial grade range] |
| Manufacturer | Originally Altera; today supplied via Rochester Electronics (authorized) | — |
| RoHS Status | [DATA_NEEDED: not explicitly confirmed in retrieved data; CERDIP packages typically non-RoHS] | [DATA_NEEDED: not confirmed in supplied web data] |
| Series | — | EP610 |
| Logic Cells / Macrocells | — | 16 macrocells |
| Product Terms | — | 160 |
| I/O Pins | — | 16 bidirectional |
| Total Inputs | — | 20 (including 4 dedicated inputs) |
| Propagation Delay (tpd) | — | 35 ns |
| Maximum Toggle Frequency | — | 28.6 MHz |
| Internal Pipelined Data Rate | — | Up to 100 MHz |
| Supply Voltage | — | 5 V |
| Technology | — | CMOS, UV-erasable |