EP610DI-25 vs EP610DC-25 Comparison
Detailed side-by-side comparison of EP610DI-25 by Intel and EP610DC-25 by Rochester Electronics. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Rochester Electronics
EP610DC-25 - 16-Macrocell Classic EPLD, 25ns tPD, CDIP-24 | Rochester
EP610DC-25 β ActiveSpecification Comparison
| Parameter | EP610DI-25 | EP610DC-25 |
|---|---|---|
| Brand | Intel | Rochester Electronics |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.95 | $9.95 |
| Part Family | Classic EPLD | β |
| Macrocells | 16 | 16 |
| Propagation Delay (tPD) | 25 ns | β |
| Maximum Pipelined Clock Frequency | 100 MHz (max fCNT, per family datasheet) | β |
| I/O Pins | 16 (bidirectional) | β |
| Dedicated Inputs | 4 | β |
| Total User I/O | 20 | β |
| Technology | CMOS EPROM (UV-erasable) | CMOS EPROM (UV-erasable) |
| Supply Voltage (VCC) | 5 V nominal | 4.75 V to 5.25 V (5 V nominal) |
| Package Type | Ceramic DIP, glass-sealed (windowed), R-GDIP-T24 | β |
| Pin Count | 24 | β |
| Mounting Type | Through-Hole (DIP) | Through Hole |
| Operating Temperature | Industrial (per "I" suffix) | 0 C to +70 C |
| Speed Grade Suffix | 25 = 25 ns | -25 (25 ns tPD) |
| Compliance | RoHS status unknown (legacy 1990s part) | β |
| Family | β | Altera Classic EPLD |
| Product Type | β | EPLD (Erasable Programmable Logic Device) |
| Equivalent Gates | β | 300 |
| Maximum Propagation Delay (tPD) | β | 25 ns |
| Pipelined Data Rate | β | Up to 100 MHz |
| Number of I/O Pins | β | 22 |
| Number of Dedicated Inputs | β | 4 |
| Total Pin Count | β | 24 |
| Package | β | 24-pin CDIP (Ceramic DIP, through-hole) |
| Programming Method | β | JEDEC fuse-map / UV-erase |