EP610DI-25 vs EP610DM-35 Comparison
Detailed side-by-side comparison of EP610DI-25 by Intel and EP610DM-35 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP610DI-25 | EP610DM-35 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.95 | $23.40 |
| Part Family | Classic EPLD | Classic EPLD |
| Macrocells | 16 | β |
| Propagation Delay (tPD) | 25 ns | 35 ns |
| Maximum Pipelined Clock Frequency | 100 MHz (max fCNT, per family datasheet) | β |
| I/O Pins | 16 (bidirectional) | 24 dedicated I/O (input + bidirectional) |
| Dedicated Inputs | 4 | β |
| Total User I/O | 20 | β |
| Technology | CMOS EPROM (UV-erasable) | β |
| Supply Voltage (VCC) | 5 V nominal | 5 V (single supply) |
| Package Type | Ceramic DIP, glass-sealed (windowed), R-GDIP-T24 | β |
| Pin Count | 24 | β |
| Mounting Type | Through-Hole (DIP) | β |
| Operating Temperature | Industrial (per "I" suffix) | β |
| Speed Grade Suffix | 25 = 25 ns | β |
| Compliance | RoHS status unknown (legacy 1990s part) | β |
| Manufacturer | β | Altera (Rochester Electronics authorized stock) |
| Logic Family | β | PAL-type EPLD, CMOS, UV-erasable |
| Number of Macrocells | β | 16 |
| Number of Gates | β | 300 |
| Pipelined Data Rate (fMAX) | β | 100 MHz |
| Package | β | 24-pin CDIP (CERDIP) with UV window |
| Temperature Grade (M) | β | Military -55Β°C to +125Β°C |
| Programmability | β | UV-erasable, reprogrammable |
| Operating Temperature Range | β | -55Β°C to +125Β°C |
| MSL Level | β | [DATA_NEEDED: MSL rating] |
| RoHS Status | β | Non-compliant (contains lead, hermetic CERDIP) |