EP610DI-25 vs EP610DM-35 Vergleich
Detaillierter Direktvergleich von EP610DI-25 von Intel und EP610DM-35 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP610DI-25 | EP610DM-35 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,95 | $23,40 |
| Part Family | Classic EPLD | Classic EPLD |
| Macrocells | 16 | — |
| Propagation Delay (tPD) | 25 ns | 35 ns |
| Maximum Pipelined Clock Frequency | 100 MHz (max fCNT, per family datasheet) | — |
| I/O Pins | 16 (bidirectional) | 24 dedicated I/O (input + bidirectional) |
| Dedicated Inputs | 4 | — |
| Total User I/O | 20 | — |
| Technology | CMOS EPROM (UV-erasable) | — |
| Supply Voltage (VCC) | 5 V nominal | 5 V (single supply) |
| Package Type | Ceramic DIP, glass-sealed (windowed), R-GDIP-T24 | — |
| Pin-Anzahl | 24 | — |
| Montageart | Through-Hole (DIP) | — |
| Betriebstemperatur | Industrial (per "I" suffix) | — |
| Speed Grade Suffix | 25 = 25 ns | — |
| Compliance | RoHS status unknown (legacy 1990s part) | — |
| Manufacturer | — | Altera (Rochester Electronics authorized stock) |
| Logic Family | — | PAL-type EPLD, CMOS, UV-erasable |
| Number of Macrocells | — | 16 |
| Number of Gates | — | 300 |
| Pipelined Data Rate (fMAX) | — | 100 MHz |
| Gehäuse | — | 24-pin CDIP (CERDIP) with UV window |
| Temperature Grade (M) | — | Military -55°C to +125°C |
| Programmability | — | UV-erasable, reprogrammable |
| Betriebstemperaturbereich | — | -55°C to +125°C |
| MSL-Level | — | [DATA_NEEDED: MSL rating] |
| RoHS-Status | — | Non-compliant (contains lead, hermetic CERDIP) |