EP610DI-30 vs EP610IDC-15 Comparison

Detailed side-by-side comparison of EP610DI-30 by Rochester Electronics and EP610IDC-15 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP610DI-30 EP610IDC-15
Brand Rochester Electronics Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Last Time Buy
Device Type EPLD (Erasable Programmable Logic Device) —
Family Classic EP610 —
Macrocells 16 16
Propagation Delay (tPD) 30 ns 15 ns
Pipelined Data Rate 100 MHz —
Technology CMOS —
Supply Voltage 5 V (single supply) —
Package CERDIP-24 (windowed, UV-erasable) 24-pin CerDIP (ceramic DIP)
Mounting Type Through-Hole Through-hole
Programmable Elements EPROM (UV-erasable, windowed) —
Operating Temperature [DATA_NEEDED: operating temperature range] 0C to +70C (commercial)
I/O Pins [DATA_NEEDED: I/O pin count] 24 (per package; macrocell-programmable)
Logic Capacity [DATA_NEEDED: usable gates / logic capacity] —
RoHS Status unknown [DATA_NEEDED: RoHS status of CerDIP variant]
Lead-Free unknown —
Original Manufacturer Altera (now Intel) —
Current Supplier Rochester Electronics (authorized continuing source) —
MSL Level N/A (through-hole, non-surface-mount) —
Device Family — Altera Classic EPLD
Usable Gates — 300
Maximum Frequency — 66 MHz
Supply Voltage (VCC) — 4.75 V to 5.25 V (5 V nominal)
Process Technology — CMOS, UV-erasable / OTP
Logic-Block Architecture — AND/OR macrocell array with programmable flip-flops
Program/Erase — UV-erasable, OTP-compatible
Development Tool — MAX+PLUS II
Programming Current — 11.0 mA typical (per Classic family datasheet)

Datasheets & Resources

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