EP610PC-25 vs EP610PC30 Comparison
Detailed side-by-side comparison of EP610PC-25 by Altera and EP610PC30 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP610PC-25 | EP610PC30 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.75 | $42.00 |
| Device Family | Classic EPLD (EP610 series) | β |
| Macro Cells | 16 | β |
| Usable Gates | 300 | 300 |
| Propagation Delay (tpd) | 25 ns | β |
| Maximum Pipelined Data Rate | 100 MHz | β |
| Supply Voltage (Vcc) | 5 V (nominal) | β |
| Technology | CMOS, EPROM (UV-erasable) | CMOS |
| Device Type | OT PLD, PAL-type, CMOS | EPLD (Erasable Programmable Logic Device) |
| Dedicated Inputs | 4 | β |
| I/O Pins | 20 (bidirectional, JTAG-programmable OE per macrocell) | β |
| Package | PDIP-24 (0.3 inch, through-hole) | PDIP-24 |
| Operating Temperature | [DATA_NEEDED: operating temperature grade] | [DATA_NEEDED: operating temperature range] |
| Programming Method | EPROM (UV-erasable), via Altera programming hardware | β |
| Mounting Type | Through-Hole (DIP) | Through-Hole |
| RoHS Status | [DATA_NEEDED: RoHS status] | Not applicable (legacy through-hole, contains Pb per historical datasheet) |
| Family | β | Classic EP610 |
| Macrocells | β | 16 |
| Propagation Delay (tPD) | β | 30 ns |
| Maximum Toggle Frequency | β | 33.3 MHz |
| Pipelined Data Rate | β | Up to 100 MHz |
| Supply Voltage (VCC) | β | 5 V |
| Programming | β | EPROM/EEPROM-based, MAX+plus II toolchain |
| Logic Capacity | β | 16 macrocells / 300 gates equivalent |
| Configuration Memory | β | Non-volatile (UV-erasable or OTP variant) |
| Manufacturer (Original) | β | Altera Corporation (now Intel FPGA) |
| Current Distributor | β | Rochester Electronics, LLC |