EP610PC-25 vs EP610PC30 Perbandingan

Perbandingan bersamaan detil EP610PC-25 dari Altera dan EP610PC30 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EP610PC-25 EP610PC30
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete NRND
Device Family Classic EPLD (EP610 series) —
Macro Cells 16 —
Usable Gates 300 300
Propagation Delay (tpd) 25 ns —
Maximum Pipelined Data Rate 100 MHz —
Supply Voltage (Vcc) 5 V (nominal) —
Technology CMOS, EPROM (UV-erasable) CMOS
Device Type OT PLD, PAL-type, CMOS EPLD (Erasable Programmable Logic Device)
Dedicated Inputs 4 —
I/O Pins 20 (bidirectional, JTAG-programmable OE per macrocell) —
Paket PDIP-24 (0.3 inch, through-hole) PDIP-24
Suhu Kerja [DATA_NEEDED: operating temperature grade] [DATA_NEEDED: operating temperature range]
Programming Method EPROM (UV-erasable), via Altera programming hardware —
Tipe Mounting Through-Hole (DIP) Through-Hole
Status RoHS [DATA_NEEDED: RoHS status] Not applicable (legacy through-hole, contains Pb per historical datasheet)
Family — Classic EP610
Macrocells — 16
Propagation Delay (tPD) — 30 ns
Maximum Toggle Frequency — 33.3 MHz
Pipelined Data Rate — Up to 100 MHz
Supply Voltage (VCC) — 5 V
Programming — EPROM/EEPROM-based, MAX+plus II toolchain
Logic Capacity — 16 macrocells / 300 gates equivalent
Configuration Memory — Non-volatile (UV-erasable or OTP variant)
Manufacturer (Original) — Altera Corporation (now Intel FPGA)
Current Distributor — Rochester Electronics, LLC

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