EP610PC-25 vs EP610PC30 비교
다음의 상세 나란히 비교: EP610PC-25 제조: Altera 및 EP610PC30 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EP610PC-25 | EP610PC30 |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | NRND |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $9.75 | $42.00 |
| Device Family | Classic EPLD (EP610 series) | — |
| Macro Cells | 16 | — |
| Usable Gates | 300 | 300 |
| Propagation Delay (tpd) | 25 ns | — |
| Maximum Pipelined Data Rate | 100 MHz | — |
| Supply Voltage (Vcc) | 5 V (nominal) | — |
| Technology | CMOS, EPROM (UV-erasable) | CMOS |
| Device Type | OT PLD, PAL-type, CMOS | EPLD (Erasable Programmable Logic Device) |
| Dedicated Inputs | 4 | — |
| I/O Pins | 20 (bidirectional, JTAG-programmable OE per macrocell) | — |
| 패키지 | PDIP-24 (0.3 inch, through-hole) | PDIP-24 |
| 동작 온도 | [DATA_NEEDED: operating temperature grade] | [DATA_NEEDED: operating temperature range] |
| Programming Method | EPROM (UV-erasable), via Altera programming hardware | — |
| 실장 유형 | Through-Hole (DIP) | Through-Hole |
| RoHS 상태 | [DATA_NEEDED: RoHS status] | Not applicable (legacy through-hole, contains Pb per historical datasheet) |
| Family | — | Classic EP610 |
| Macrocells | — | 16 |
| Propagation Delay (tPD) | — | 30 ns |
| Maximum Toggle Frequency | — | 33.3 MHz |
| Pipelined Data Rate | — | Up to 100 MHz |
| Supply Voltage (VCC) | — | 5 V |
| Programming | — | EPROM/EEPROM-based, MAX+plus II toolchain |
| Logic Capacity | — | 16 macrocells / 300 gates equivalent |
| Configuration Memory | — | Non-volatile (UV-erasable or OTP variant) |
| Manufacturer (Original) | — | Altera Corporation (now Intel FPGA) |
| Current Distributor | — | Rochester Electronics, LLC |