EP610PC-25 vs EP610PC30 比較
詳細な並列比較: EP610PC-25 メーカー: Altera および EP610PC30 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP610PC-25 | EP610PC30 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | NRND |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $9.75 | $42.00 |
| Device Family | Classic EPLD (EP610 series) | — |
| Macro Cells | 16 | — |
| Usable Gates | 300 | 300 |
| Propagation Delay (tpd) | 25 ns | — |
| Maximum Pipelined Data Rate | 100 MHz | — |
| Supply Voltage (Vcc) | 5 V (nominal) | — |
| Technology | CMOS, EPROM (UV-erasable) | CMOS |
| Device Type | OT PLD, PAL-type, CMOS | EPLD (Erasable Programmable Logic Device) |
| Dedicated Inputs | 4 | — |
| I/O Pins | 20 (bidirectional, JTAG-programmable OE per macrocell) | — |
| パッケージ | PDIP-24 (0.3 inch, through-hole) | PDIP-24 |
| 動作温度 | [DATA_NEEDED: operating temperature grade] | [DATA_NEEDED: operating temperature range] |
| Programming Method | EPROM (UV-erasable), via Altera programming hardware | — |
| 実装タイプ | Through-Hole (DIP) | Through-Hole |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | Not applicable (legacy through-hole, contains Pb per historical datasheet) |
| Family | — | Classic EP610 |
| Macrocells | — | 16 |
| Propagation Delay (tPD) | — | 30 ns |
| Maximum Toggle Frequency | — | 33.3 MHz |
| Pipelined Data Rate | — | Up to 100 MHz |
| Supply Voltage (VCC) | — | 5 V |
| Programming | — | EPROM/EEPROM-based, MAX+plus II toolchain |
| Logic Capacity | — | 16 macrocells / 300 gates equivalent |
| Configuration Memory | — | Non-volatile (UV-erasable or OTP variant) |
| Manufacturer (Original) | — | Altera Corporation (now Intel FPGA) |
| Current Distributor | — | Rochester Electronics, LLC |