EP910DC-15 vs EP910ILC-15N Comparison
Detailed side-by-side comparison of EP910DC-15 by Altera and EP910ILC-15N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP910ILC-15N - 450 Gate 24-Macrocell Classic CPLD, 15ns, 5V, 44-PLCC | Altera
EP910ILC-15N ObsoleteSpecification Comparison
| Parameter | EP910DC-15 | EP910ILC-15N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $10.75 | $9.85 |
| Family | Altera Classic EPLD | Classic |
| Device Density | 900 usable gates | β |
| Macrocells | 24 | β |
| Logic Elements | [DATA_NEEDED: exact LE count] | β |
| Dedicated Inputs | 12 | β |
| Bidirectional I/O Pins | 12 | β |
| Flip-Flops | 10 | β |
| Product Terms per Macrocells | 24 | β |
| Maximum Propagation Delay (tPD) | 15 ns | 15 ns |
| Speed Grade | 15 | β |
| Supply Voltage (VCC) | 5 V (typical) | 4.75 V to 5.25 V (5 V nominal) |
| Operating Temperature | 0C to +70C (commercial) | 0 C to +70 C (commercial) |
| Technology | CMOS EPROM, UV-erasable | β |
| Package | 24-pin ceramic DIP (DC) | PLCC-44 (J-lead, surface mount) |
| Mounting Type | Through-Hole | Surface Mount |
| MSL Level | [DATA_NEEDED: MSL level] | β |
| RoHS Status | [DATA_NEEDED: not explicitly stated in verified data] | Compliant |
| Product Type | β | CPLD (Complex Programmable Logic Device) |
| Logic Gates | β | 450 |
| Macro Cells | β | 24 |
| Maximum Operating Frequency | β | 66.6 MHz |
| User I/O Pins | β | 36 |
| Dedicated Input Pins | β | 16 |
| Process Technology | β | CMOS EPROM (one-time programmable) |
| JTAG Support | β | IEEE 1149.1 boundary-scan |
| Programming | β | EPROM / JTAG (Classic EP-series) |