EP910DC-40 vs EP910DI-35 Comparison

Detailed side-by-side comparison of EP910DC-40 by Altera and EP910DI-35 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP910DC-40 EP910DI-35
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Active
Stock Status In Stock In Stock
Unit Price (USD) $13.95 $35.20
Device Family Classic EPLD (EP910 series) β€”
Architecture PAL-type AND/OR, UV-erasable CMOS β€”
Macrocells 24 24
Dedicated Inputs 12 10
Bidirectional I/O Pins 24 20
Total Inputs to Logic Array 36 β€”
Product Terms 240 maximum β€”
Maximum Propagation Delay (tPD) 40 ns β€”
Maximum Operating Frequency (fMAX) 25 MHz β€”
Global Clocks 2 β€”
Supply Voltage 5 V (typical for Classic EPLD family) β€”
Operating Temperature (Commercial) 0 Β°C to 70 Β°C β€”
Package DIP-40 (ceramic, through-hole) CDIP-40 (Ceramic DIP with UV window)
Mounting Type Through-Hole Through-Hole
RoHS Status [DATA_NEEDED: rohs_status] [DATA_NEEDED: RoHS status - ceramic CDIP legacy parts are typically non-compliant unless specified]
Programming Method UV-erase + EPROM programmer; on-board logic test circuitry EPROM programmer + JEDEC fuse map
Product Type β€” EPLD (Erasable Programmable Logic Device)
Family β€” Altera Classic EPLD
Usable Gates β€” 450
Propagation Delay (tPD) β€” 35 ns
Maximum Toggle Frequency (fCNT) β€” 28.6 MHz
Supply Voltage (VCC) β€” 4.75 V to 5.25 V (5 V nominal)
Supply Current (ICC) β€” 40 mA typical
Total Pins β€” 40
Operating Temperature β€” -40C to +85C (industrial)
Technology β€” CMOS, UV-erasable EPROM
Erasure Method β€” UV light through quartz window
Logic Family β€” PAL-type AND/OR array with D flip-flops
Manufacturer β€” Original Altera; long-term authorized by Rochester Electronics, LLC

Datasheets & Resources

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