EP910DI-35 vs EP9100C-30 Comparison
Detailed side-by-side comparison of EP910DI-35 by Altera and EP9100C-30 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP910DI-35
EP910DI-35 - 24-Macrocell EPLD, 35ns, CDIP-40 | Altera/Rochester
EP910DI-35 β ActiveAltera
EP9100C-30
EP9100C-30 - 900 Gates Classic EPLD, 30ns CMOS | Intel / Altera
EP9100C-30 ObsoleteSpecification Comparison
| Parameter | EP910DI-35 | EP9100C-30 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $35.20 | $7.95 |
| Product Type | EPLD (Erasable Programmable Logic Device) | β |
| Family | Altera Classic EPLD | Altera Classic EPLD |
| Macrocells | 24 | 48 |
| Usable Gates | 450 | β |
| Propagation Delay (tPD) | 35 ns | 30 ns |
| Maximum Toggle Frequency (fCNT) | 28.6 MHz | β |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | 4.75 V to 5.25 V (5 V nominal) |
| Supply Current (ICC) | 40 mA typical | β |
| Dedicated Inputs | 10 | 24 |
| Bidirectional I/O Pins | 20 | β |
| Total Pins | 40 | β |
| Package | CDIP-40 (Ceramic DIP with UV window) | 40-pin ceramic DIP (CDIP) / 44-pin PLCC (windowed) / 40-pin PDIP |
| Mounting Type | Through-Hole | Through-Hole (DIP) / Surface Mount (PLCC) |
| Operating Temperature | -40C to +85C (industrial) | 0C to +70C (commercial) |
| Technology | CMOS, UV-erasable EPROM | CMOS, UV-erasable (window) or OTP |
| Programming Method | EPROM programmer + JEDEC fuse map | JEDEC via Altera APU or compatible programmer |
| Erasure Method | UV light through quartz window | β |
| RoHS Status | [DATA_NEEDED: RoHS status - ceramic CDIP legacy parts are typically non-compliant unless specified] | [DATA_NEEDED: rohs_status] |
| Logic Family | PAL-type AND/OR array with D flip-flops | β |
| Manufacturer | Original Altera; long-term authorized by Rochester Electronics, LLC | β |
| Logic Density | β | 900 usable gates (approx.) |
| Flip-Flops | β | 24 |
| Maximum Toggle Frequency (fMAX) | β | 62.5 MHz |
| I/O Standard | β | TTL-compatible |
| Military Grade Variant | β | EP9100C-30/883 (MIL-STD-883 compliant) |