EP910JM-40 vs EP910DM-40 Comparison
Detailed side-by-side comparison of EP910JM-40 by Altera and EP910DM-40 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910JM-40 | EP910DM-40 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.95 | $21.00 |
| Device Family | Altera Classic EPLD | β |
| Series | EP910 | β |
| Logic Type | EPLD (UV-Erasable PAL-type) | β |
| Macrocells | 24 | 24 |
| Dedicated Inputs | 12 | 36 |
| I/O Lines | 24 | β |
| Total Inputs (max) | 36 | β |
| Total Outputs (max) | 24 | β |
| Product Terms | 240 | 240 |
| External Clock Inputs | 2 | β |
| Propagation Delay (tPD) | 40 ns | 40 ns |
| Process Technology | CMOS | CMOS |
| Package | JLCC-28 (windowed ceramic, J-lead) | 40-pin Ceramic DIP (Cerdip) with UV window |
| Mounting Type | Surface Mount | Through-Hole (DIP) |
| RoHS Status | [DATA_NEEDED: RoHS status - UV-windowed ceramic package typically not RoHS compliant] | [DATA_NEEDED: RoHS compliance status] |
| Programming Method | UV erase + EPROM programmer | β |
| Operating Temperature | 0C to +70C (commercial) [DATA_NEEDED: confirm grade] | [DATA_NEEDED: operating temperature range] |
| Product Type | β | UV Erasable Programmable Logic Device (EPLD) |
| Family | β | Altera Classic EP910 |
| Architecture | β | PAL-type AND/OR with global programmable interconnect bus |
| Dedicated Outputs | β | 24 |
| Bidirectional I/O Lines | β | 24 |
| External Clocks | β | 2 |
| Supply Voltage | β | 5 V |
| Programming Interface | β | JEDEC-standard fuse-map / UV erasure |