EP910JM-40 vs EP910DM-40 比較
詳細な並列比較: EP910JM-40 メーカー: Altera および EP910DM-40 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP910JM-40 | EP910DM-40 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $9.95 | $21.00 |
| Device Family | Altera Classic EPLD | — |
| Series | EP910 | — |
| Logic Type | EPLD (UV-Erasable PAL-type) | — |
| Macrocells | 24 | 24 |
| Dedicated Inputs | 12 | 36 |
| I/O Lines | 24 | — |
| Total Inputs (max) | 36 | — |
| Total Outputs (max) | 24 | — |
| Product Terms | 240 | 240 |
| External Clock Inputs | 2 | — |
| Propagation Delay (tPD) | 40 ns | 40 ns |
| Process Technology | CMOS | CMOS |
| パッケージ | JLCC-28 (windowed ceramic, J-lead) | 40-pin Ceramic DIP (Cerdip) with UV window |
| 実装タイプ | Surface Mount | Through-Hole (DIP) |
| RoHS ステータス | [DATA_NEEDED: RoHS status - UV-windowed ceramic package typically not RoHS compliant] | [DATA_NEEDED: RoHS compliance status] |
| Programming Method | UV erase + EPROM programmer | — |
| 動作温度 | 0C to +70C (commercial) [DATA_NEEDED: confirm grade] | [DATA_NEEDED: operating temperature range] |
| Product Type | — | UV Erasable Programmable Logic Device (EPLD) |
| Family | — | Altera Classic EP910 |
| Architecture | — | PAL-type AND/OR with global programmable interconnect bus |
| Dedicated Outputs | — | 24 |
| Bidirectional I/O Lines | — | 24 |
| External Clocks | — | 2 |
| 電源電圧 | — | 5 V |
| Programming Interface | — | JEDEC-standard fuse-map / UV erasure |