EP910LI44-35 vs EP910LC44-35 比較
詳細並排比較 EP910LI44-35 由 Altera 與 EP910LC44-35 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP910LI44-35 | EP910LC44-35 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | NRND |
| Device Family | Altera Classic EPLD | — |
| Series | EP910 | — |
| Architecture | PAL-type macrocell (EPLD) | PAL-type AND/OR array |
| Number of Macrocells | 24 | — |
| Number of External Clocks | 2 | — |
| 最大時脈頻率 | 37 MHz | — |
| Propagation Delay (tPD) | 35 ns | 35 ns (max) |
| Process Technology | CMOS | CMOS |
| 供應電壓 | [DATA_NEEDED: VCC range] | — |
| 腳位數 | 44 | — |
| Package Type | PLCC-44 (J-lead) | — |
| 安裝類型 | Surface Mount / Through-Hole Socket | Surface Mount |
| 工作溫度 | [DATA_NEEDED: temperature grade] | 0C to +70C (commercial) |
| Programmability | UV-erasable / one-time programmable | UV-erasable (windowed ceramic) |
| RoHS 狀態 | unknown | — |
| Logic Family | Classic EPLD | — |
| Family | — | Classic EPLD (OT sub-family) |
| Macrocells | — | 24 |
| Usable Gates | — | 450 |
| Maximum Frequency (fMAX) | — | 28.6 MHz |
| Total Inputs | — | 36 |
| I/O Pins | — | 24 |
| Global Clocks | — | 2 |
| Supply Voltage (VCC) | — | 5 V (single supply) |
| 封裝 | — | 44-pin PLCC (J-leaded) |