EP910PI-15T vs EP910PC-20T Comparison
Detailed side-by-side comparison of EP910PI-15T by Altera and EP910PC-20T by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910PI-15T | EP910PC-20T |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Unknown |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $10.95 | $8.70 |
| Product Type | Classic EPLD (Erasable Programmable Logic Device) | β |
| Family | Altera Classic EPLD (EP910 series) | Classic EPLD |
| Macrocells | 24 | β |
| Dedicated Inputs | 12 | β |
| I/O Pins | 24 | β |
| Logic Blocks | 6 LABs of 4 macrocells each (Classic architecture) | β |
| Supply Voltage | 4.5 V to 5.5 V (5 V nominal) | [DATA_NEEDED: operating supply voltage] |
| Propagation Delay (tPD) | 15 ns max (speed grade -15) | β |
| Technology | CMOS EEPROM (electrically erasable) | β |
| Package | 40-pin PDIP (Plastic DIP, R-PDIP-T40) | β |
| Mounting Type | Through-Hole | β |
| Output Drive Current | [DATA_NEEDED: per-pin DC output current, mA] | β |
| Operating Temperature | [DATA_NEEDED: industrial/commercial temp range] | [DATA_NEEDED: operating temperature range] |
| Programming | JEDEC-standard, serial/parallel programmer | β |
| RoHS Status | [DATA_NEEDED: original Altera part; likely non-RoHS as 5V PDIP] | unknown |
| Device Type | β | EPLD |
| Fabrication Technology | β | CMOS |
| Logic Integration | β | 300 to 900 usable gates |
| Logic Emulation | β | 100% TTL emulation |
| Application Function | β | High-speed, low-power logic integration |
| Programmable Device Class | β | Erasable programmable logic device |
| Device Family | β | Altera Classic EPLD Family |
| Speed Grade | β | 20 ns |
| Package Code | β | PC |
| Package Pin Count | β | [DATA_NEEDED: package pin count] |
| Package Dimensions | β | [DATA_NEEDED: package dimensions] |
| I/O Count | β | [DATA_NEEDED: I/O count] |
| Internal Logic Capacity | β | 300 to 900 usable gates |
| Supported Logic Integration | β | Multiple PAL- and GAL-type devices |
| Programming Interface | β | [DATA_NEEDED: programming interface] |
| Programming Voltage | β | [DATA_NEEDED: programming voltage] |
| Mounting Technology | β | [DATA_NEEDED: mounting technology] |
| REACH Status | β | unknown |
| AEC-Q100 Qualification | β | not_applicable |
| Lead-Free Status | β | unknown |
| Halogen-Free Status | β | unknown |