EP910PI-25 vs EP910PI-12T Comparison
Detailed side-by-side comparison of EP910PI-25 by Intel and EP910PI-12T by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910PI-25 | EP910PI-12T |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $10.95 | $9.95 |
| Family | Altera Classic EPLD | Altera Classic EPLD |
| Device | EP910 | β |
| Macrocells | 24 | 24 |
| Dedicated Inputs | 12 | 12 |
| I/O Pins | 24 | 24 |
| Pin-to-Pin Propagation Delay (tPD) | 25 ns | β |
| Maximum Clock Frequency (fMAX) | 40 MHz | β |
| Supply Voltage (VCC) | 5 V nominal | 5 V (4.75 V min, 5.25 V max) |
| Process Technology | 5 V CMOS (EPROM-based) | CMOS |
| Package | PDIP-40 (Plastic DIP) | 40-pin PDIP (Plastic DIP) |
| Pin Count | 40 | β |
| Mounting Type | Through-Hole | β |
| Operating Temperature | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Programmability | UV-erasable (windowed) / one-time-programmable | β |
| RoHS Status | Non-compliant (PDIP package) | Non-compliant (legacy PDIP package, contains lead) |
| Propagation Delay (tPD) | β | 12 ns |
| Maximum Operating Frequency | β | 76.9 MHz |
| Logic Gates | β | [DATA_NEEDED: logic gate count] |
| External Clock Inputs | β | 2 |
| Outputs | β | 24 |
| Terminals / Pin Count | β | 44 (PDIP-40 package pinout with NC pins) |
| Programmable Technology | β | UV-erasable EPROM |
| Programming Interface | β | JEDEC-standard |
| Lifecycle Status | β | NRND / EOL (mature legacy product) |