EPC1064VLC20 vs EPC2LC20 Comparison
Detailed side-by-side comparison of EPC1064VLC20 by Altera and EPC2LC20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPC1064VLC20 | EPC2LC20 |
|---|---|---|
| Brand | Altera | Altera |
| Category | Memory ICs | Memory ICs |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $1.51 | $7.20 |
| Memory Type | OTP (One-Time Programmable) Configuration PROM | Non-volatile configuration PROM |
| Memory Size | 65,536 bit (64 Kb) | 1.6 Mbit |
| Organization | 64K x 1 (serial) | β |
| Interface | Serial, daisy-chain capable | β |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5.0 V nominal) | β |
| Programmable Type | OTP (factory programmed; not in-system programmable) | β |
| Package | 20-pin PLCC (J-lead, 9 x 9 mm) | 20-pin PLCC (J-lead, 9x9 mm) |
| Operating Temperature | 0C to +70C (commercial) | -40C to +85C (industrial) [DATA_NEEDED: exact grade from datasheet] |
| Compatible FPGA Families | ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX | β |
| Cascade Support | Yes, daisy-chain output for up to 8 devices | Yes - daisy-chain multiple EPC2 devices via JTAG for larger bitstreams |
| Mounting Type | Surface Mount (PLCC socket compatible) | Surface Mount |
| RoHS Status | [DATA_NEEDED: RoHS compliance] | Non-Compliant (original Altera Pb-containing part) |
| Lead-Free | [DATA_NEEDED: lead-free status] | β |
| MSL Level | [DATA_NEEDED: MSL rating] | β |
| Programming Method | Altera programming hardware (factory, pre-solder) | β |
| Configuration Interface | β | Serial (x1) to FPGA via DCLK/nCONFIG/nSTATUS/CONF_DONE |
| Programming Interface | β | IEEE 1149.1 (JTAG) ISP, 5.0-V and 3.3-V tolerant |
| Supply Voltage VCC | β | 3.0 V to 3.6 V (3.3-V operation) |
| ISP Voltage Range | β | 5.0 V or 3.3 V |
| Supported FPGA Families | β | ACEX 1K, APEX 20K/20KC/20KE, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, MAX 9000 |
| Lead-Free Version | β | EPC2LC20N available as lead-free equivalent |
| Programming Support | β | Altera Programming Unit (APU), Quartus II, JTAG programmer |
| Boundary-Scan | β | IEEE 1149.1 compliant, 8-bit or 16-bit JTAG |