EPC1LI20 vs EPC1PCB Comparison

Detailed side-by-side comparison of EPC1LI20 by Altera and EPC1PCB by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPC1LI20 EPC1PCB
Brand Altera Intel
Category Memory ICs FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $8.50 $9.60
Memory Type OTP Configuration PROM (EPROM-based) β€”
Memory Size 1 Mb (1,048,576 bits) β€”
Configuration Interface Altera Passive Serial / Altera Active Serial / JTAG (IEEE 1149.1) β€”
Maximum Configuration Clock 8 MHz β€”
Supply Voltage (VCC) 5.0 V (4.75 V to 5.25 V) β€”
Programming Voltage (VPP) 12.75 V (typical, factory-programmed via JTAG) β€”
Package 20-pin PLCC (J-lead, 9x9 mm) PLCC-20 (Plastic Leaded Chip Carrier)
Pin Count 20 β€”
Operating Temperature [DATA_NEEDED: operating temperature range] β€”
Cascading Support Yes (nCASC pin for multi-device daisy chain) β€”
Endurance OTP (one-time programmable, 1000 erase-equivalent UV cycles for pre-program erase) β€”
JTAG Programming Yes (in-system via IEEE 1149.1) β€”
Compatible FPGA Families FLEX 8000, FLEX 10K, ACEX 1K, APEX 20K, Mercury β€”
Mounting Type Surface Mount (PLCC socket compatible) Surface Mount (socket-compatible)
MSL Level 1 (per Partstack datasheet record) β€”
RoHS Status [DATA_NEEDED: RoHS status - original Altera part may be non-RoHS SnPb finish] [DATA_NEEDED: lead-free/RoHS status]
Product Type β€” Enhanced Configuration Device for SRAM-based FPGAs
Memory Density β€” 1 Mbit
Program Memory Type β€” Flash (non-volatile)
Configuration Modes Supported β€” FPP (Fast Passive Parallel), PS (Passive Serial)
Supply Voltage VCC β€” 3.3 V
I/O Voltage Tolerance β€” 5.0 V tolerant
Supported FPGA Families β€” APEX, FLEX, ACEX, Cyclone, Stratix
Interface β€” Altera configuration bus (DATA, DCLK, nCONFIG, nSTATUS, CONF_DONE)
Multi-Device Daisy Chain β€” Yes (nCASC, nCS pins)
Programming Interface β€” JTAG (IEEE 1149.1 boundary scan)
In-System Programmable β€” Yes
Program/Erase Endurance β€” [DATA_NEEDED: program/erase cycles]
Data Retention β€” [DATA_NEEDED: data retention years]

Datasheets & Resources

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