EPC2LI20NGA vs EPC2LI20 Comparison

Detailed side-by-side comparison of EPC2LI20NGA by Altera and EPC2LI20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPC2LI20NGA EPC2LI20
Brand Altera Altera
Category FPGA & CPLD Memory ICs
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $4.35 $5.95
Memory Size 1.6 Mbit 1.6 Mb (1,572,864 bits)
Function In-System Programmable Configuration PROM Configuration PROM for SRAM-based FPGAs
Target Device SRAM-based LUT FPGAs β€”
Package 20-PLCC (9x9 mm) β€”
Operating Temperature Range -40C to +85C (Industrial) β€”
Supply Voltage 3.0 V to 3.6 V (3.3 V typical) β€”
Configuration Interface Passive Serial / Passive Parallel Serial or Byte-wide (parallel)
Programming Method In-System via JTAG (IEEE 1149.1) β€”
Cascadable Yes (DATA, DCLK chain) β€”
RoHS Status Compliant (lead-free 'G' suffix) [DATA_NEEDED: RoHS status]
Mounting Type Surface Mount / Thru-Hole Socket Surface Mount (PLCC socket-compatible)
Lead-Free Termination Yes (NiPdAu) β€”
Process Technology CMOS EEPROM β€”
Manufacturer Altera / Intel PSG β€”
Datasheet Document EPC2 datasheet (Altera) β€”
Memory Type β€” Flash (in-system programmable)
Programmable Type β€” In System Programmable (ISP)
Supply Voltage - Operating β€” 3.0 V to 3.6 V and 4.5 V to 5.5 V (auto-sensing)
Operating Temperature β€” -40 C to +85 C (Industrial)
Package / Case β€” 20-PLCC (J-lead, 9x9 mm)
Decompression β€” On-chip (supports compressed bitstreams)
JTAG / ISP Interface β€” IEEE 1532 (TCK, TMS, TDI, TDO)
Multi-Device Support β€” Yes (daisy-chain configuration)
User-Accessible Memory β€” Yes (unused flash available to user logic)
MSL Level β€” [DATA_NEEDED: MSL level]

Datasheets & Resources

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