EPC2LI20NGA vs EPC2LI20 比較

詳細並排比較 EPC2LI20NGA 由 Altera 與 EPC2LI20 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPC2LI20NGA EPC2LI20
品牌 Altera Altera
類別 FPGA & CPLD Memory ICs
生命週期狀態 Obsolete NRND
記憶體容量 1.6 Mbit 1.6 Mb (1,572,864 bits)
功能 In-System Programmable Configuration PROM Configuration PROM for SRAM-based FPGAs
Target Device SRAM-based LUT FPGAs —
封裝 20-PLCC (9x9 mm) —
工作溫度範圍 -40C to +85C (Industrial) —
供應電壓 3.0 V to 3.6 V (3.3 V typical) —
Configuration Interface Passive Serial / Passive Parallel Serial or Byte-wide (parallel)
Programming Method In-System via JTAG (IEEE 1149.1) —
Cascadable Yes (DATA, DCLK chain) —
RoHS 狀態 Compliant (lead-free 'G' suffix) [DATA_NEEDED: RoHS status]
安裝類型 Surface Mount / Thru-Hole Socket Surface Mount (PLCC socket-compatible)
Lead-Free Termination Yes (NiPdAu) —
Process Technology CMOS EEPROM —
Manufacturer Altera / Intel PSG —
Datasheet Document EPC2 datasheet (Altera) —
記憶體類型 — Flash (in-system programmable)
Programmable Type — In System Programmable (ISP)
Supply Voltage - Operating — 3.0 V to 3.6 V and 4.5 V to 5.5 V (auto-sensing)
工作溫度 — -40 C to +85 C (Industrial)
封裝 / 外殼 — 20-PLCC (J-lead, 9x9 mm)
Decompression — On-chip (supports compressed bitstreams)
JTAG / ISP Interface — IEEE 1532 (TCK, TMS, TDI, TDO)
Multi-Device Support — Yes (daisy-chain configuration)
User-Accessible Memory — Yes (unused flash available to user logic)
MSL 等級 — [DATA_NEEDED: MSL level]

資料表與資源

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