EPF6010ATC100-3 vs EPF6010ANTC100-2 Comparison

Detailed side-by-side comparison of EPF6010ATC100-3 by Intel and EPF6010ANTC100-2 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Intel
EPF6010ANTC100-2 EPF6010ANTC100-2 - FLEX 6000 FPGA, 880 LEs, 71 I/O, 100-TQFP | Intel

EPF6010ANTC100-2 - FLEX 6000 FPGA, 880 LEs, 71 I/O, 100-TQFP | Intel

EPF6010ANTC100-2 ⚠ Last Time Buy

Specification Comparison

Parameter EPF6010ATC100-3 EPF6010ANTC100-2
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Last_time_buy
Stock Status In Stock In Stock
Unit Price (USD) $18.90 $17.50
Family FLEX 6000 FLEX 6000 / FLEX 6000A
Logic Elements / Cells 880 β€”
Usable Gates 10,000 β€”
Logic Array Blocks (LABs) 88 β€”
User I/O Pins 71 β€”
Process Technology 0.42 Β΅m CMOS SRAM β€”
Supply Voltage (VCCINT) 3.3 V 5.0 V (FLEX 6000A); 3.3 V (FLEX 6000)
I/O Voltage Tolerance 3.3 V / 5 V tolerant β€”
Speed Grade -3 (commercial, slowest grade) -2
Package TQFP-100 (100-pin) 100-pin TQFP (14x14 mm, 0.5 mm pitch)
Mounting Type Surface Mount Surface Mount
Configuration Memory SRAM (external configuration device required) β€”
JTAG Support Yes (IEEE 1149.1) β€”
Operating Temperature 0C to +70C (commercial) Commercial (0C to +70C)
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance]
MSL Level [DATA_NEEDED: MSL level] 3 (168 hours)
Logic Elements β€” 880
Programmable I/O Pins β€” 71
Configuration Method β€” SRAM (volatile), in-system programmable
Programming Interface β€” IEEE 1149.1 (JTAG) / passive serial / EPC configuration device
I/O Standards Supported β€” TTL, CMOS, PCI (with clamping diodes)
Number of LABs β€” [DATA_NEEDED: LAB count]
Embedded Memory β€” [DATA_NEEDED: embedded RAM blocks]
Global Clock Networks β€” [DATA_NEEDED: global clock count]
Packaging β€” Tray (per Altera packing standard)

Datasheets & Resources

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