EPF6010ATC100-3 vs EPF6010ANTC100-2 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPF6010ATC100-3 sa pamamagitan ng Intel at EPF6010ANTC100-2 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPF6010ANTC100-2 - FLEX 6000 FPGA, 880 LEs, 71 I/O, 100-TQFP | Intel
EPF6010ANTC100-2 ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EPF6010ATC100-3 | EPF6010ANTC100-2 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Huling Pagbili |
| Family | FLEX 6000 | FLEX 6000 / FLEX 6000A |
| Logic Elements / Cells | 880 | — |
| Usable Gates | 10,000 | — |
| Logic Array Blocks (LABs) | 88 | — |
| User I/O Pins | 71 | — |
| Process Technology | 0.42 µm CMOS SRAM | — |
| Supply Voltage (VCCINT) | 3.3 V | 5.0 V (FLEX 6000A); 3.3 V (FLEX 6000) |
| I/O Voltage Tolerance | 3.3 V / 5 V tolerant | — |
| Speed Grade | -3 (commercial, slowest grade) | -2 |
| Packhaging | TQFP-100 (100-pin) | 100-pin TQFP (14x14 mm, 0.5 mm pitch) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Configuration Memory | SRAM (external configuration device required) | — |
| JTAG Support | Yes (IEEE 1149.1) | — |
| Temperature na Operasyon | 0C to +70C (commercial) | Commercial (0C to +70C) |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance] |
| Level ng MSL | [DATA_NEEDED: MSL level] | 3 (168 hours) |
| Logic Elements | — | 880 |
| Programmable I/O Pins | — | 71 |
| Configuration Method | — | SRAM (volatile), in-system programmable |
| Programming Interface | — | IEEE 1149.1 (JTAG) / passive serial / EPC configuration device |
| I/O Standards Supported | — | TTL, CMOS, PCI (with clamping diodes) |
| Number of LABs | — | [DATA_NEEDED: LAB count] |
| Embedded Memory | — | [DATA_NEEDED: embedded RAM blocks] |
| Global Clock Networks | — | [DATA_NEEDED: global clock count] |
| Packaging | — | Tray (per Altera packing standard) |