EPM240T100A5N vs EPM240T100I3N Comparison

Detailed side-by-side comparison of EPM240T100A5N by Altera and EPM240T100I3N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM240T100A5N

EPM240T100A5N - 192-Macrocell MAX II CPLD, 100-TQFP | Intel / Altera

EPM240T100A5N βœ“ Active
Intel
EPM240T100I3N

EPM240T100I3N - 192-Macrocell MAX II CPLD, 100-TQFP, Industrial | Intel

EPM240T100I3N ⚠ Last Time Buy

Specification Comparison

Parameter EPM240T100A5N EPM240T100I3N
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Last_time_buy
Stock Status In Stock In Stock
Unit Price (USD) $7.05 $5.45
Family MAX II MAX II
Macro Cells 192 β€”
Logic Elements (LE) 240 β€”
User I/O Count 80 β€”
Pin-to-Pin Logic Delay (tPD) 4.7 ns β€”
Maximum Internal Frequency 201.1 MHz β€”
Supply Voltage 2.5 V / 3.3 V β€”
I/O Bank Count 4 (multi-voltage) β€”
Process Technology 0.18 Β΅m β€”
Configuration Memory On-chip Flash (instant-on) β€”
Programming Interface JTAG (IEEE 1149.1) / ISP JTAG / IEEE 1149.1 ISP
Package 100-pin TQFP (14 x 14 x 1.0 mm) TQFP-100 (T100), 14x14 mm, 0.5 mm pitch
Operating Temperature 0C to +85C (commercial, "A5N" suffix) β€”
Mounting Type Surface Mount β€”
RoHS Status Compliant (Pb-free) Compliant
Device Logic Elements / Macrocells β€” 192 macrocells
Maximum User I/O Pins β€” 80
Number of Logic Array Blocks (LABs) β€” 4
On-chip User Flash Memory β€” 8 Kbits
Internal Performance β€” 304 MHz
Pin-to-pin Logic Delay (tPD1) β€” 4.6 ns
Global Clock Networks β€” 4
Technology Node β€” 0.18 um, 6-layer-metal flash CMOS
Supply Voltage - Core β€” 2.5 V / 3.3 V
MultiVolt I/O Support β€” 1.5 V / 1.8 V / 2.5 V / 3.3 V
Operating Junction Temperature β€” -40C to +100C (industrial, 'I' grade)
Speed Grade β€” 3
Instant-on (non-volatile) β€” Yes (flash-based)
MSL Level β€” 3 (per JEDEC J-STD-020)

Datasheets & Resources

Browse All Products Create BOM Request Quote