EPM240T100A5N vs EPM240T100I3N Vergleich
Detaillierter Direktvergleich von EPM240T100A5N von Altera und EPM240T100I3N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EPM240T100I3N - 192-Macrocell MAX II CPLD, 100-TQFP, Industrial | Intel
EPM240T100I3N ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EPM240T100A5N | EPM240T100I3N |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $7,05 | $5,45 |
| Family | MAX II | MAX II |
| Macro Cells | 192 | — |
| Logic Elements (LE) | 240 | — |
| User I/O Count | 80 | — |
| Pin-to-Pin Logic Delay (tPD) | 4.7 ns | — |
| Maximum Internal Frequency | 201.1 MHz | — |
| Versorgungsspannung | 2.5 V / 3.3 V | — |
| I/O Bank Count | 4 (multi-voltage) | — |
| Process Technology | 0.18 µm | — |
| Configuration Memory | On-chip Flash (instant-on) | — |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | JTAG / IEEE 1149.1 ISP |
| Gehäuse | 100-pin TQFP (14 x 14 x 1.0 mm) | TQFP-100 (T100), 14x14 mm, 0.5 mm pitch |
| Betriebstemperatur | 0C to +85C (commercial, "A5N" suffix) | — |
| Montageart | Surface Mount | — |
| RoHS-Status | Compliant (Pb-free) | Compliant |
| Device Logic Elements / Macrocells | — | 192 macrocells |
| Maximum User I/O Pins | — | 80 |
| Number of Logic Array Blocks (LABs) | — | 4 |
| On-chip User Flash Memory | — | 8 Kbits |
| Internal Performance | — | 304 MHz |
| Pin-to-pin Logic Delay (tPD1) | — | 4.6 ns |
| Global Clock Networks | — | 4 |
| Technology Node | — | 0.18 um, 6-layer-metal flash CMOS |
| Supply Voltage - Core | — | 2.5 V / 3.3 V |
| MultiVolt I/O Support | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Betriebs-Sperrschichttemperatur | — | -40C to +100C (industrial, 'I' grade) |
| Speed Grade | — | 3 |
| Instant-on (non-volatile) | — | Yes (flash-based) |
| MSL-Level | — | 3 (per JEDEC J-STD-020) |