EPM240T100A5N vs EPM240T100I3N 对比
详细并排对比 EPM240T100A5N 出自 Altera 和 EPM240T100I3N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Intel
EPM240T100I3N - 192-Macrocell MAX II CPLD, 100-TQFP, Industrial | Intel
EPM240T100I3N ⚠ 最后一次采购规格对比
| 参数 | EPM240T100A5N | EPM240T100I3N |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 有效 | 最后采购期 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $7.05 | $5.45 |
| Family | MAX II | MAX II |
| Macro Cells | 192 | — |
| Logic Elements (LE) | 240 | — |
| User I/O Count | 80 | — |
| Pin-to-Pin Logic Delay (tPD) | 4.7 ns | — |
| Maximum Internal Frequency | 201.1 MHz | — |
| 电源电压 | 2.5 V / 3.3 V | — |
| I/O Bank Count | 4 (multi-voltage) | — |
| Process Technology | 0.18 µm | — |
| Configuration Memory | On-chip Flash (instant-on) | — |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | JTAG / IEEE 1149.1 ISP |
| 封装 | 100-pin TQFP (14 x 14 x 1.0 mm) | TQFP-100 (T100), 14x14 mm, 0.5 mm pitch |
| 工作温度 | 0C to +85C (commercial, "A5N" suffix) | — |
| 安装类型 | Surface Mount | — |
| RoHS 状态 | Compliant (Pb-free) | Compliant |
| Device Logic Elements / Macrocells | — | 192 macrocells |
| Maximum User I/O Pins | — | 80 |
| Number of Logic Array Blocks (LABs) | — | 4 |
| On-chip User Flash Memory | — | 8 Kbits |
| Internal Performance | — | 304 MHz |
| Pin-to-pin Logic Delay (tPD1) | — | 4.6 ns |
| Global Clock Networks | — | 4 |
| Technology Node | — | 0.18 um, 6-layer-metal flash CMOS |
| Supply Voltage - Core | — | 2.5 V / 3.3 V |
| MultiVolt I/O Support | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| 工作结温 | — | -40C to +100C (industrial, 'I' grade) |
| Speed Grade | — | 3 |
| Instant-on (non-volatile) | — | Yes (flash-based) |
| MSL 等级 | — | 3 (per JEDEC J-STD-020) |