EPM3128ATC144-10 vs EPM3128ATC144-5N Comparison

Detailed side-by-side comparison of EPM3128ATC144-10 by Altera and EPM3128ATC144-5N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM3128ATC144-5N EPM3128ATC144-5N - MAX 3000A 128-Macro 5ns CPLD | Altera

EPM3128ATC144-5N - MAX 3000A 128-Macro 5ns CPLD | Altera

EPM3128ATC144-5N ⚠ Last Time Buy

Specification Comparison

Parameter EPM3128ATC144-10 EPM3128ATC144-5N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Last Time Buy
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) CPLD - Complex Programmable Logic Device
Macro Cells 128 —
User I/Os 96 —
Usable Gates 2,500 (typical) 2500
Logic Elements / LABs 4 Logic Array Blocks —
Propagation Delay (tPD) 10 ns (speed grade -10) —
Counter Frequency (fCNT) Up to 227.3 MHz —
Supply Voltage (VCCINT) 3.3 V —
MultiVolt I/O Interface 1.5V / 1.8V / 2.5V / 3.3V —
In-System Programmability IEEE Std. 1532 compliant Yes (3.3-V via JTAG)
Boundary-Scan Test IEEE Std. 1149.1 (JTAG) —
Configuration Memory EEPROM (non-volatile, instant-on) —
Package 144-pin TQFP (TQ144) 144-pin TQFP (20x20 mm)
Mounting Type Surface Mount Surface Mount
Operating Temperature 0C to +70C (commercial) 0C to 70C (Commercial)
RoHS Status Compliant Compliant (lead-free)
Lead-Free Yes —
Logic Family — CMOS
Macrocells — 128
User I/O — 96
Pin-to-Pin Logic Delay — 5 ns
Counter Frequency — up to 227.3 MHz
Supply Voltage (Core) — 3.3 V
I/O Logic Levels Supported — 5.0 V / 3.3 V / 2.5 V (MultiVolt)
JTAG Boundary Scan — IEEE Std 1149.1 compliant

Datasheets & Resources

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