EPM3128ATI100-5N vs EPM3128ATI10010N Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM3128ATI100-5N disebabkan oleh Intel dan EPM3128ATI10010N disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Intel
EPM3128ATI100-5N - MAX 3000A CPLD, 128 Macrocells, TQFP-100 | Intel / Altera
EPM3128ATI100-5N ✓ AktifPengandingan Spesifikasi
| Parametr | EPM3128ATI100-5N | EPM3128ATI10010N |
|---|---|---|
| Merek | Intel | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Aktif | Aktif |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 128 | — |
| Logic Array Blocks (LABs) | 8 (16 macrocells per LAB) | 8 |
| User I/O Pins | 80 | — |
| Pin-to-Pin Delay (tPD) | 5.0 ns | — |
| Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Standard | 3.3 V LVCMOS / LVTTL, 5.0 V tolerant inputs | — |
| Programming Method | In-System Programmable via IEEE Std. 1532 (JTAG) | — |
| Suhu Operasi | -40C to +85C (Industrial) | 0 C to +70 C (commercial) |
| Kemasan | 100-pin TQFP | 100-pin TQFP |
| Jenis Pemasangan | Surface Mount | Surface Mount |
| Configuration Memory | Non-volatile EEPROM | — |
| JTAG Support | IEEE 1149.1 boundary scan | — |
| Status RoHS | Compliant (lead-free TQFP package) | unknown |
| Macro Cells | — | 128 |
| Usable Gates | — | 2,500 |
| User I/Os | — | 80 |
| Bilangan Pin | — | 100 |
| Propagation Delay (tPD) | — | 10 ns |
| Maximum Internal Frequency | — | 98 MHz |
| Core Supply Voltage | — | 3.0 V to 3.6 V |
| I/O Bank Voltage | — | 1.8 V / 2.5 V / 3.3 V |
| Process Technology | — | CMOS EEPROM |
| Programming Interface | — | JTAG (IEEE 1149.1) ISP |
| PCI Compliance | — | Yes (speed grades -5/-6/-7/-10) |