EPM3512AFC256-3N vs EPM3512AFC256-2 Comparison

Detailed side-by-side comparison of EPM3512AFC256-3N by Altera and EPM3512AFC256-2 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM3512AFC256-3N EPM3512AFC256-3N - MAX 3000A CPLD 512 Macrocells | Altera

EPM3512AFC256-3N - MAX 3000A CPLD 512 Macrocells | Altera

EPM3512AFC256-3N βœ“ Active

Specification Comparison

Parameter EPM3512AFC256-3N EPM3512AFC256-2
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $23.40 $14.85
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) β€”
Macrocells 512 512
Usable Gates 10,000 β€”
Logic Array Blocks (LABs) 16 16
Maximum Operating Frequency 116.3 MHz [DATA_NEEDED: fMAX MHz]
Pin-to-Pin Delay (tPD) 3.5 ns (speed grade -3) β€”
Speed Grade -3 (slowest in family) -2
Core Supply Voltage (VCCINT) 3.3 V β€”
I/O Supply Voltage (VCCIO) 2.5 V / 3.3 V / 5.0 V (MultiVolt) β€”
Package 256-ball FineLine BGA (FC-256) BGA-256 (FineLine BGA)
Mounting Type Surface Mount β€”
Programming Interface JTAG (IEEE 1149.1) / IEEE Std. 1532 ISP JTAG (IEEE Std 1149.1) / ByteBlaster
Configuration Memory Non-volatile EEPROM β€”
Operating Temperature [DATA_NEEDED: operating temperature grade] 0C to +70C (commercial)
RoHS Status [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS status]
Maximum User I/O Pins β€” 212
Propagation Delay (tPD, -2 grade) β€” [DATA_NEEDED: tPD ns]
Core Supply Voltage β€” 3.3 V
I/O Output Drive Voltage β€” 2.5 V or 3.3 V (MultiVolt)
Input Tolerance β€” 2.5 V, 3.3 V, 5.0 V tolerant
Ball Pitch β€” 1.0 mm
Process Technology β€” 0.30 um CMOS EEPROM

Datasheets & Resources

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