EPM3512ATI256-10N vs EPM3512AFI256-10N Comparison
Detailed side-by-side comparison of EPM3512ATI256-10N by Intel and EPM3512AFI256-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM3512AFI256-10N - 512-Macro MAX 3000A CPLD, 256-FBGA | Intel/Altera
EPM3512AFI256-10N β Last Time BuySpecification Comparison
| Parameter | EPM3512ATI256-10N | EPM3512AFI256-10N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $19.85 | $21.75 |
| Manufacturer | Intel (formerly Altera Corporation) | β |
| Family | MAX 3000A | MAX 3000A |
| Device | EPM3512A | β |
| Macrocells | 512 | β |
| Usable Gates | 10,000 | Up to 10,000 |
| Logic Array Blocks (LABs) | 16 | β |
| Maximum User I/O | 212 | β |
| Speed Grade | -10 (10 ns pin-to-pin delay) | -10 (10 ns tPD) |
| Package | 256-pin BGA (TI256) | 256-ball FineLine BGA (FBGA-256) |
| Operating Temperature | -40C to +85C (Industrial) | β |
| Core Voltage | 3.3 V | β |
| I/O Voltage Support | 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt) | β |
| Programming Technology | EEPROM (non-volatile, in-system programmable) | β |
| JTAG Support | IEEE Std 1149.1 boundary-scan, 4-pin JTAG | β |
| Programmable Security Bit | Yes (design protection) | β |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | [DATA_NEEDED: RoHS status] | Compliant |
| Lifecycle Status | Obsolete / Last Time Buy (per Altera product discontinuation notices) | β |
| Series | β | EPM3512 |
| Device Type | β | CPLD (Complex Programmable Logic Device) |
| Architecture | β | CMOS EEPROM-based, MAX architecture |
| Number of Macrocells | β | 512 |
| Number of Logic Array Blocks (LABs) | β | 16 |
| Number of User I/O | β | 208 |
| Total Pins | β | 256 |
| Pin-to-Pin Propagation Delay (tPD) | β | 10 ns |
| Maximum Counter Frequency | β | 227.3 MHz |
| Core Supply Voltage (VCCINT) | β | 3.3 V (3.0 V to 3.6 V) |
| I/O Supply Voltage (VCCIO) | β | 2.5 V or 3.3 V (5.0 V tolerant inputs) |
| MultiVolt I/O Support | β | 5.0 V / 3.3 V / 2.5 V |
| In-System Programmability | β | Yes - IEEE Std 1532 compliant |
| JTAG Boundary Scan | β | Yes - IEEE 1149.1 |
| Program Memory | β | EEPROM (non-volatile) |
| Operating Temperature Range | β | -40 Β°C to +85 Β°C (industrial) |