EPM5128GC-1 vs EPM5064JC Comparison

Detailed side-by-side comparison of EPM5128GC-1 by Altera and EPM5064JC by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5128GC-1 EPM5064JC
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $18.95 $7.10
Family MAX 5000 MAX 5000
Device Type UV-erasable CMOS CPLD EPLD (Erasable PLD)
Macrocells 128 64
Usable Gates 2,500 1,250 (approx.)
Dedicated Inputs 7 β€”
Maximum User I/O Pins 52 β€”
Nominal Supply Voltage 5 V β€”
Supply Voltage Range 4.75 V to 5.25 V β€”
Maximum Operating Frequency 62.5 MHz β€”
Propagation Delay (tPD) 16 ns (typical, -1 speed grade) β€”
Package PGA-96+ (Pin Grid Array, ceramic windowed) 68-pin PLCC (JEDEC)
Technology CMOS, UV-erasable EPROM β€”
Operating Temperature -40C to +85C (industrial) [DATA_NEEDED: operating temperature grade]
IOL / IOH 100 mA / 25 mA per pin (legacy figure, [DATA_NEEDED: verify exact drive spec]) β€”
Security Bit Programmable, prevents readback β€”
Programming Method UV erase + EPROM program (or device programmer) β€”
MSL Level [DATA_NEEDED: MSL level] [DATA_NEEDED: MSL rating]
RoHS Status [DATA_NEEDED: RoHS compliance - ceramic PGA part is legacy] [DATA_NEEDED: RoHS compliance]
Logic Array Inputs β€” 36
Logic Array Outputs β€” 64
Mounting Type β€” Surface Mount (socketed)
Supply Voltage (VCC) β€” 5 V (typical, 4.75 V - 5.25 V range)
I/O Logic Level β€” TTL / CMOS compatible
Configuration Memory β€” EPROM (UV-erasable window or OTP)
Pin-to-Pin Delay (tPD) β€” [DATA_NEEDED: specific tPD grade value]
Maximum Frequency (fMAX) β€” [DATA_NEEDED: fCNT grade value]
Lead-Free β€” [DATA_NEEDED: lead-free status]
Programming Tool β€” Altera MAX+PLUS II / Quartus II (legacy device support)

Datasheets & Resources

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