EPM5130QC-1 vs EPM5130JC-1 Comparison
Detailed side-by-side comparison of EPM5130QC-1 by Altera and EPM5130JC-1 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5130QC-1 | EPM5130JC-1 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.95 | $9.25 |
| Family | MAX 5000 | MAX 5000 |
| Product Type | UV-Erasable / OTP Complex PLD (CPLD) | CPLD (Complex Programmable Logic Device) |
| Logic Cells / Macrocells | 128 macrocells | β |
| Usable Gates (marketing) | 5130 gates | β |
| Speed Grade | -1 | β |
| Package | PQFP-100 (windowed ceramic) | 84-pin PLCC (J-lead) |
| Terminal Pitch | 0.635 mm | β |
| Process Technology | CMOS | CMOS |
| Configuration Memory | UV-Erasable EPROM | β |
| Supply Voltage | 5 V (single) | β |
| Operating Temperature | Commercial (0 C to +70 C) | 0C to +70C (commercial) |
| Programmable Polarity | Yes (per macrocell) | β |
| Boundary Scan / JTAG | Per MAX 5000 family | β |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS compliance] |
| Usable Gates | β | 2,500 gates |
| Macrocells | β | 128 |
| Logic Array Blocks (LABs) | β | 8 |
| Maximum Operating Frequency | β | 62.5 MHz |
| Propagation Delay (tPD) | β | 40 ns |
| Supply Voltage (VCC) | β | 5 V |
| Dedicated Inputs | β | 19 |
| I/O Pins | β | 80 |
| Programming Technology | β | UV-erasable EPROM (quartz window) |
| External Clock Pins | β | 1 global clock |