EPM5130QC-1 vs EPM5130JC-1 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM5130QC-1 disebabkan oleh Altera dan EPM5130JC-1 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EPM5130QC-1 | EPM5130JC-1 |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Product Type | UV-Erasable / OTP Complex PLD (CPLD) | CPLD (Complex Programmable Logic Device) |
| Logic Cells / Macrocells | 128 macrocells | — |
| Usable Gates (marketing) | 5130 gates | — |
| Speed Grade | -1 | — |
| Kemasan | PQFP-100 (windowed ceramic) | 84-pin PLCC (J-lead) |
| Terminal Pitch | 0.635 mm | — |
| Process Technology | CMOS | CMOS |
| Configuration Memory | UV-Erasable EPROM | — |
| Tegangan Pemberi Arus | 5 V (single) | — |
| Suhu Operasi | Commercial (0 C to +70 C) | 0C to +70C (commercial) |
| Programmable Polarity | Yes (per macrocell) | — |
| Boundary Scan / JTAG | Per MAX 5000 family | — |
| Jenis Pemasangan | Surface Mount | Surface Mount |
| Status RoHS | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS compliance] |
| Usable Gates | — | 2,500 gates |
| Macrocells | — | 128 |
| Logic Array Blocks (LABs) | — | 8 |
| Maximum Operating Frequency | — | 62.5 MHz |
| Propagation Delay (tPD) | — | 40 ns |
| Supply Voltage (VCC) | — | 5 V |
| Dedicated Inputs | — | 19 |
| I/O Pins | — | 80 |
| Programming Technology | — | UV-erasable EPROM (quartz window) |
| External Clock Pins | — | 1 global clock |