EPM5192AJC84-20 vs EPM5192AJM84-20 Comparison
Detailed side-by-side comparison of EPM5192AJC84-20 by Altera and EPM5192AJM84-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM5192AJC84-20 - 192-Macrocell UV PLD, 33ns, 84-Pin J-Lead | Altera
EPM5192AJC84-20 Obsolete
Specification Comparison
| Parameter | EPM5192AJC84-20 | EPM5192AJM84-20 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $19.20 | $171.00 |
| Family | MAX 5000 | β |
| Device Type | UV-erasable/OTP Complex PLD (CPLD) | CMOS UV-Erasable/OTP Complex PLD |
| Macrocells | 192 | 192 |
| Propagation Delay (tpd) | 33 ns (speed grade -20) | β |
| Maximum Clock Frequency | 66.7 MHz | 66.7 MHz |
| Supply Voltage (Vcc) | 4.75 V to 5.25 V | β |
| Dedicated Inputs | 7 | 7 |
| User I/O Lines | 64 | β |
| Process Technology | CMOS, UV-erasable EEPROM | CMOS EPROM (UV-erasable) |
| Package | 84-pin PLCC J-Lead (WQCCJ, J84) | 84-pin CQFP (S-CQCC-J84, J-lead) |
| Operating Temperature Grade | Commercial | β |
| Mounting Type | Surface Mount (J-Lead) | β |
| MSL Level | [DATA_NEEDED: MSL level] | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: rohs status] |
| Programming Tool | Altera MAX+PLUS II / Quartus (legacy) | β |
| Lead-Free / Halogen-Free | [DATA_NEEDED: lead-free status] | β |
| Manufacturer | β | Altera (now Intel) |
| Series | β | MAX 5000 (EPM5192) |
| Logic Array Blocks (LABs) | β | 12 |
| User I/O Pins | β | 64 |
| Programmable Interconnect | β | PIA (Programmable Interconnect Array) |
| Propagation Delay (tPD) | β | 33 ns (speed grade -20) |
| Terminal Form | β | J-Bend |
| Temperature Grade | β | MILITARY |
| Erasure Method | β | UV (quartz-windowed CQFP) or OTP |