EPM5192JC-2 vs EPM5192GM883B-2 Comparison
Detailed side-by-side comparison of EPM5192JC-2 by Altera and EPM5192GM883B-2 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5192JC-2 | EPM5192GM883B-2 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $22.50 | $142.00 |
| Device Family | MAX 5000 | β |
| Product Type | UV-erasable Programmable Logic Device (PLD) | β |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 12 | β |
| Interconnect | Programmable Interconnect Array (PIA) | β |
| User I/O Pins | 64 | 64 |
| Dedicated Inputs | 7 | 7 |
| External Clock Inputs | 1 | β |
| Propagation Delay (tPD) | 45 ns | 45 ns (-2 speed grade) |
| Maximum Clock Frequency | 40 MHz | β |
| Process Technology | CMOS | β |
| Package | 84-pin CQCC (Ceramic Quad Flat Pack, J-lead, windowed) | 84-pin Ceramic Pin Grid Array (CPGA), code S-CPGA-P84 |
| Mounting Type | Surface Mount | Through-hole PGA socket |
| Number of Terminals | 84 | β |
| Programming Method | UV-erase / EPROM | β |
| Operating Temperature Range | [DATA_NEEDED: operating temperature range] | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance] | non_compliant (ceramic CPGA with MIL-STD-883 screening) |
| Family | β | MAX 5000 |
| Device Type | β | CPLD (Complex Programmable Logic Device), UV-erasable |
| Maximum Internal Clock Frequency | β | 33.3 MHz |
| Supply Voltage (VCC, nominal) | β | 5 V |
| Technology | β | 5 V CMOS |
| Package Outline | β | 28.45 mm square (approx.) |
| Military Screening | β | MIL-STD-883 (per '883' suffix) |
| Operating Temperature | β | [DATA_NEEDED: operating temperature range] |
| JEDEC Package Code | β | S-CPGA-P84 |