EPM5192JC vs EPM5192JC-ES Comparison

Detailed side-by-side comparison of EPM5192JC by Intel and EPM5192JC-ES by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5192JC EPM5192JC-ES
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $16.40 $16.45
Product Type CPLD (Complex Programmable Logic Device) β€”
Series EPM5192 (Classic / MAX-class) β€”
Macrocells 192 192
Logic Array Blocks (LABs) 12 12
Interconnect Architecture Programmable Interconnect Array (PIA) β€”
Process Technology CMOS EPROM (UV-erasable) β€”
Package 68-pin PLCC (JC) windowed ceramic 84-pin PLCC (J-lead, CQCC, JEDEC S-CQCC-J84)
Mounting Type Surface Mount Surface Mount
Programming Method UV-erase + EPROM programmer β€”
Non-Volatile Configuration Yes (EPROM cell array) β€”
Logic Family Classic CPLD (EPM5xxx series) β€”
Operating Temperature [DATA_NEEDED: commercial / industrial / military grade] [DATA_NEEDED: operating temperature range for ES grade]
Supply Voltage [DATA_NEEDED: VCC nominal] [DATA_NEEDED: VCC nominal]
Propagation Delay [DATA_NEEDED: tpd spec by speed grade] β€”
RoHS Status [DATA_NEEDED: original Altera marking not RoHS] [DATA_NEEDED: RoHS compliance]
Device Family β€” MAX 5000
Device Type β€” CPLD (EPLD)
Interconnect β€” Programmable Interconnect Array (PIA)
Configuration Memory β€” EPROM (UV-erasable, one-time programmable for JC-ES)
Technology β€” CMOS
Programming β€” Altera MAX+PLUS II or compatible programmer
User I/O Pins β€” [DATA_NEEDED: user I/O count for JC-ES in PLCC-84]
Lead-Free β€” [DATA_NEEDED: lead-free status]
MSL Level β€” [DATA_NEEDED: MSL rating]
Note β€” Datasheet source: Altera MAX 5000 family document, 52 pages

Datasheets & Resources

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