EPM5192LC-2 vs EPM5192LC Comparison

Detailed side-by-side comparison of EPM5192LC-2 by Altera and EPM5192LC by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5192LC-2 EPM5192LC
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $7.95 $28.40
Family MAX 5000 MAX 7000S
Device Type CPLD (Complex Programmable Logic Device) β€”
Macrocells 192 192
Logic Array Blocks (LABs) 12 12
User I/O Pins 64 64
Dedicated Input Pins 7 β€”
External Clock Inputs 1 β€”
Propagation Delay (tPD) 45 ns (typical, -2 speed grade) 55 ns (typical, commercial)
Maximum Internal Frequency 50 MHz β€”
Interconnect Programmable Interconnect Array (PIA) β€”
Process Technology CMOS CMOS, UV-erasable/OTP EPROM configuration
Package PQCC-84 (PLCC-84, J-lead, surface mount) JLCC-68 (windowed ceramic, LC suffix)
Programming Non-volatile (EPROM/EEPROM-based, in-system programmable via JTAG) β€”
Operating Temperature [DATA_NEEDED: commercial/industrial/military grade] β€”
Supply Voltage 5 V (typical MAX 5000 family) β€”
RoHS Status [DATA_NEEDED: pre-RoHS legacy part β€” likely non-RoHS] [DATA_NEEDED: RoHS status]
Dedicated Inputs β€” 7
Global Clock Inputs β€” 1
Maximum Clock Frequency (fMAX) β€” 50 MHz
Supply Voltage (VCC) β€” 4.75 V to 5.25 V (nominal 5 V)
Programmable Interconnect β€” Programmable Interconnect Array (PIA), fixed delay
Boundary-Scan Support β€” JTAG IEEE 1149.1
Programming Interface β€” JTAG (ByteBlaster-compatible)
Operating Temperature (commercial) β€” 0C to +70C
Mounting Type β€” Surface Mount

Datasheets & Resources

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